am335x uboot 2013.01 can't work

I change the reference as follows:

1, config the uboot2013.01 accroding to uboot2011.09,however uboot2013.01 add a register ZQ_CONFIG, i use the default value in uboot2013.01. uboot2013 reduce 3 registers than uboot2011.09,so i also don't deal with it and keep the default set in uboot2013.01.

2.screen the eeprom function in uboot2013.01

now, uboot can't work, what can i do ?

pls help me ,thanks

Can you post the log file up to where u-boot hangs? If you suspect DDR issues you should follow these guidelines for setting up DDR parameters:

i think my ddr reference is right, the work is to migrate the reference from uboot2011.09(old version) to uboot 2013.01(new version)

when i migrate the reference,i find that:

1.  new verison add register emif_zq_config,secure_emif_sdram_config, however the old verison doesn't have them, so i use the default configuration in new verison .

ddr.c

void config_sdram(const struct emif_regs *regs)

{
if (regs->zq_config) {
/*
* A value of 0x2800 for the REF CTRL will give us
* about 570us for a delay, which will be long enough
* to configure things.
*/
writel(0x2800, &emif_reg->emif_sdram_ref_ctrl);
writel(regs->zq_config, &emif_reg->emif_zq_config);
writel(regs->sdram_config, &cstat->secure_emif_sdram_config);
writel(regs->sdram_config, &emif_reg->emif_sdram_config);
writel(regs->ref_ctrl, &emif_reg->emif_sdram_ref_ctrl);
writel(regs->ref_ctrl, &emif_reg->emif_sdram_ref_ctrl_shdw);
}
writel(regs->ref_ctrl, &emif_reg->emif_sdram_ref_ctrl);
writel(regs->ref_ctrl, &emif_reg->emif_sdram_ref_ctrl_shdw);
writel(regs->sdram_config, &emif_reg->emif_sdram_config);
}

2. the new version seems to loss 3 register define as follows:

ddr.c

void config_ddr_data(int macrono, const struct ddr_data *data) 
{
 writel(data->datardsratio0, &ddr_reg[macrono]->dt0rdsratio0); 
 writel(data->datawdsratio0, &ddr_reg[macrono]->dt0wdsratio0); 
 writel(data->datawiratio0, &ddr_reg[macrono]->dt0wiratio0);  
 writel(data->datagiratio0, &ddr_reg[macrono]->dt0giratio0); 
 writel(data->datafwsratio0, &ddr_reg[macrono]->dt0fwsratio0); 
 writel(data->datawrsratio0, &ddr_reg[macrono]->dt0wrsratio0); 
 writel(data->datauserank0delay, &ddr_reg[macrono]->dt0rdelays0);
 writel(data->datadldiff0, &ddr_reg[macrono]->dt0dldiff0); 
}

i add the code in board.c as follows:

board.c  

static const struct ddr_data ddr3_evm_data = {
 .datardsratio0 = MT41J512M8RH125_RD_DQS,
 .datawdsratio0 = MT41J512M8RH125_WR_DQS,
 .datafwsratio0 = MT41J512M8RH125_PHY_FIFO_WE,
 .datawrsratio0 = MT41J512M8RH125_PHY_WR_DATA,
 .datadldiff0 = PHY_DLL_LOCK_DIFF,
#if 0
 .datawiratio0 =MT41J512M8RH125_PHY_WRLVL,/*offset: 0xf0*/ 
 .datagiratio0 =MT41J512M8RH125_PHY_GATELVL,/*offset:0xfc*/
 .datauserank0delay=MT41J512M8RH125_RAND_DELAYS,/*offset:0x134*/
#endif
};

ddr_defs.h

#if 0
#define MT41J512M8RH125_PHY_WRLVL      0x20
#define MT41J512M8RH125_PHY_GATELVL     0x20
#define MT41J512M8RH125_RAND_DELAYS     0x1
#endif

however , no mather i add  the code between #if 0 and #endif  or delete the code between #if 0 and #endif  

when i compile them in ubuntu and copy the MLO and uboot.img to sdcard. i set boot from sdcard and power

up, the debug uart has none information to output. even don't output CCCCCCCCCCC.

i must emphasize that: the old version uboot can work in my hardware board. i also don't change my debug environmen. so why the new verison uboot can't work??

do any other sites must be modified in the uboot 2013.01 code that i don't  pay attention ?

Check the <u-boot>/board/ti/am335x/board.c file. This is where the DDR configuration happens.

Best regards,
Miroslav

i have check the board.c  ddr.c ddr_defs.h servel times, i think the ddr reference will not be configurate wrong except the description as aboves.

maybe there have some other code need to be modified because even the ddr reference configuration is wrong,when power up, the debug uart0 will output like belows:

U-Boot SPL 2013.01 (Sep 24 2014 - 21:58:36)
Texas Instruments Revision detection unimplemented

so ,i don't know how to do?

today, i find that  MLO may don't work because i find 3 MLO file and when power up  the debug can output

U-Boot SPL 201xxxxxxxxxxxxxxxxxxxxxxx

Texas Instruments Revision xxxxxxxxxxxxxxxxxxxxx

so why build uboot from uboot2013.01(from sdk6.0) and can't output information on the debug uart0?

i can boot from uart0,the boot set is 0100 0010 0011 0111   (mmc0 spi0 uart0 usb0),the debug information is :

CCCCCCCC
U-Boot SPL 2013.01.01 (Sep 26 2014 - 12:13:39)
Could not probe the EEPROM; something fundamentally wrong on the I2C bus.
Could not get board ID.
musb-hdrc: ConfigData=0xde (UTMI-8, dyn FIFOs, bulk combine, bulk split, HB-ISO
Rx, HB-ISO Tx, SoftConn)
musb-hdrc: MHDRC RTL version 2.0
musb-hdrc: setup fifo_mode 4
musb-hdrc: 28/31 max ep, 16384/16384 memory
USB Peripheral mode controller at 47401000 using PIO, IRQ 0
musb-hdrc: ConfigData=0xde (UTMI-8, dyn FIFOs, bulk combine, bulk split, HB-ISO
Rx, HB-ISO Tx, SoftConn)
musb-hdrc: MHDRC RTL version 2.0
musb-hdrc: setup fifo_mode 4
musb-hdrc: 28/31 max ep, 16384/16384 memory
USB Host mode controller at 47401800 using PIO, IRQ 0
CCCxyzModem - CRC mode, 2(SOH)/358(STX)/0(CAN) packets, 5 retries
Loaded 366036 bytes

U-Boot 2013.01.01 (Sep 26 2014 - 12:13:39)

I2C: ready
DRAM: 512 MiB
WARNING: Caches not enabled
Could not probe the EEPROM; something fundamentally wrong on the I2C bus.
Could not get board ID.
NAND: 2048 MiB
MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1
ECC: uncorrectable.
ECC: uncorrectable.
ECC: uncorrectable.
ECC: uncorrectable.
NAND read from offset 260000 failed -74
*** Warning - readenv() failed, using default environment

musb-hdrc: ConfigData=0xde (UTMI-8, dyn FIFOs, bulk combine, bulk split, HB-ISO
Rx, HB-ISO Tx, SoftConn)
musb-hdrc: MHDRC RTL version 2.0
musb-hdrc: setup fifo_mode 4
musb-hdrc: 28/31 max ep, 16384/16384 memory
USB Peripheral mode controller at 47401000 using PIO, IRQ 0
musb-hdrc: ConfigData=0xde (UTMI-8, dyn FIFOs, bulk combine, bulk split, HB-ISO
Rx, HB-ISO Tx, SoftConn)
musb-hdrc: MHDRC RTL version 2.0
musb-hdrc: setup fifo_mode 4
musb-hdrc: 28/31 max ep, 16384/16384 memory
USB Host mode controller at 47401800 using PIO, IRQ 0
Net: PHY reset timed out
cpsw, usb_ether
Hit any key to stop autoboot: 0
U-Boot#

so the ddr and uart0 is configurated is ok , howver this boot can't boot my board from sd. i see the mmc0 config in the mux.c is 

static struct module_pin_mux mmc0_pin_mux[] = {
{OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT3 */
{OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT2 */
{OFFSET(mmc0_dat1), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT1 */
{OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT0 */
{OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CLK */
{OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CMD */
{OFFSET(mcasp0_aclkr), (MODE(4) | RXACTIVE)}, /* MMC0_WP */
{OFFSET(spi0_cs1), (MODE(5) | RXACTIVE | PULLUP_EN)},/* MMC0_CD */
{-1},
};

the boot2011.09 are the same as 2013.01

however the hadware my board is  

/*MMC0_WP*/(no used but connect to PMIC sleep as a gpio and pull up) 

* MMC0_CD */(connect to mcasp0_aclkx )

so , no matter how to change this config and build in ubuntu, the boot can't work?

why?  

i think now the problem is the configuration of mmc0 because

1. i have try 2 other boot ,they can work in this board.

2. uart0 can boot this board

so how to do now?

i am in trobule.