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How to determine a C55x DSP is CPU Rev 3.x or not

lding
Guru* 95265 points

A customer asked me, "Can you tell us how to determine our C55x CPU Rev?  The "DSP chip and die revision" register on some of our boards in the lab says:  0x60500751." 

Is this the correct register to look at? what is the CPU Rev then?

Thanks, Eric

  • 0
    TI__Mastermind 23785 points

    There isn't a register bit for such matter. Customer has to refer to the device description and reference guides to determine. For example:

    C5515, description and references refer to as v3.x CPU:

    For more information on these components, see the following documents:
    •    TMS320C55x 3.0 CPU Reference Guide (SWPU073).
    •    TMS320C55x v3.x CPU Algebraic Instruction Set Reference Guide (SWPU068E)
    •    TMS320C55x v3.x CPU Mnemonic Instruction Set Reference Guide (SWPU067E)
    •    TMS320C55x DSP Peripherals Overview Reference Guide (SPRU317)

    And for VC5502, the reference guides for same subject are all different:

    TMS320C55x Technical Overview (literature number SPRU393) introduces
    the TMS320C55x DSPs, the latest generation of fixed-point DSPs in the TMS320C5000ä DSP platform.
    Like the previous generations, this processor is optimized for high performance and low-power
    operation. This book describes the CPU architecture, low-power enhancements, and embedded emulation
    features.

    TMS320C55x DSP Peripherals Overview Reference Guide (literature number SPRU317) introduces the
    peripherals, interfaces, and related hardware that are available on TMS320C55x DSPs.

    TMS320C55x DSP Algebraic Instruction Set Reference Guide (literature number SPRU375) describes the
    TMS320C55x DSP algebraic instructions individually. Also includes a summary of the instruction set,
    a list of the instruction opcodes, and a cross-reference to the mnemonic instruction set.

    TMS320C55x DSP Mnemonic Instruction Set Reference Guide (literature number SPRU374) describes the
    TMS320C55x DSP mnemonic instructions individually. Also includes a summary of the instruction set,
    a list of the instruction opcodes, and a cross-reference to the algebraic
    instruction set.

    Regards.

  • 0 in reply to Steve Tsang
    TI__Mastermind 30110 points

    Refer to the CPU Core Version Guide for C55x DSP Processors:

    http://processors.wiki.ti.com/images/f/f4/C55x_CPU_revision.pdf

    Hope this helps,
    Mark

  • 0 in reply to Mark M
    TI__Guru* 95265 points

    Thanks! I will let you if I have further questions or not.

    Regards, Eric

     

  • 0 in reply to lding
    TI__Guru* 95265 points

    The customer uses TNETV3010 (C5561), is this the same as C5501?

    Regards, Eric

  • 0 in reply to lding
    TI__Mastermind 23785 points

    Both TNETV3010 and C5561 do not show up on www.ti.com search. What is the reason for asking this question? For sure I can tell TNETV3010 IS NOT DSP v3.x.

    Regards.

  • 0 in reply to Steve Tsang
    TI__Guru* 95265 points

    Steve,

    The customer is a voice gateway customer who uses TNETV3010, its codename is Janus. The TNETV3010 has 6 C55x DSP cores, we are not sure about its CPU Rev.

    We have some code running on Rev 3 CPU, but we don't know if that code can run on TNETV3010 as well, e.g, Can Rev 3 CPU code runs on ealier Rev 2 or Rev 1 CPU?

    Regards, Eric