question about MSMCSRAM's memory allocation

Feng

Hi all,

The FPGA transfers data to DSP through SRIO DIO using SWRITE packet. In FPGA, I just set the Address of SWRITE packet to 0x0C000000 to write the data to DSP's MSMCSRAM.

But I had set some sections to MSMCSRAM in CMD file.

How to avoid these sections not to cover the 0x0C0000000(llength may be 0x1000 bytes)?

Regards,

Feng

over 10 years ago

0 Ganapathi Dhandapani95 over 10 years ago

TI__Mastermind 28085 points

Hi Feng,

Try to change the MSMCSRAM base address 0x0c000000 to 0x0c001000 in .cmd file.

MEMORY
{
    L1PSRAM (RWX)  : org = 0x0E00000, len = 0x7FFF
    L1DSRAM (RWX)  : org = 0x0F00000, len = 0x7FFF 

    L2SRAM (RWX)   : org = 0x0800000, len = 0x080000
    MSMCSRAM (RWX) : org = 0xc010000, len = 0x200000
    DDR3 (RWX)     : org = 0x80000000,len = 0x10000000
}

SECTIONS
{
    .csl_vect   >       MSMCSRAM
    .text       >       MSMCSRAM
    GROUP (NEAR_DP)
    {
    .neardata
    .rodata 
    .bss
    } load > MSMCSRAM
    .stack      >       MSMCSRAM
    .cinit      >       MSMCSRAM
    .cio        >       MSMCSRAM
    .const      >       MSMCSRAM
    .data       >       MSMCSRAM
    .switch     >       MSMCSRAM
    .sysmem     >       MSMCSRAM
    .far        >       MSMCSRAM
    .testMem    >       MSMCSRAM
    .fardata    >       MSMCSRAM
    platform_lib > 		MSMCSRAM
}

For more information refer platform test example in MCSDK package.

MCSDK Path: "\ti\pdk_C6678_1_1_2_6\packages\ti\platform\evmc6678l\platform_test"

Thanks,

Processors

Processors forum

question about MSMCSRAM's memory allocation