• State Resolved
  • Locked Locked
  • Replies 1 reply
  • Subscribers 98 subscribers
  • Views 563 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

K2H NAND Size

Justin Henderson
Expert 1085 points

Other Parts Discussed in Thread: 66AK2H12

Greetings,

What is the largest NAND size that the 66AK2H12 will support? We are moving towards having the Keystone act as a SPI master to boot some other peripherals.


Thanks.

  • 0
    TI__Guru** 116780 points

     NAND memory addressing doesn't use the address lines so there isn't a limit to the size of NAND part that can be used to interface with EMIF16. The addressing is handled by the software driver that you develop. The hardware ECC accelerator inside the part is limited 1bit ECC for 512 bytes or 4bit ECC for  518 bytes. This is compatible with the requirements for many of the smaller capacity NAND flash parts but is not sufficient for some of the larger capacity parts. These parts can still be used in your design but you will have to do the ECC calculation in software instead of using the hardware accelerator in the EMIF16. This is discussed in the EMIF16 users guide.

    For boot purposes, we recommend that you use a NAND part that is ONFI compatible and supports 1 bit or 4 bit ECC as ROM bootloader implments ECC based correction. The ROM is built to determine geormetry of the NAND by using READ ID commands or by using Read schemes supported by ONFI NAND s  to read NAND parameters.

    Regards,

    Rahul