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McASP AUXCLK

If I need the McASP receive clock to be 20MHz for an ADC, I determined that the DSP oscillator should also be 20MHz because the AUXCLK divide-down is from the external oscillator, and not from the PLL.  

I have two questions: (1) Is this determination correct?

(2) Is there any downside to having a 20MHz external oscillator for the TMSC6745.

Does anyone have any other recommendations?

Thanks - Rich

  • Hi Rich,

    You can use external oscillator for McASP RX clock.

    You need to configure the RX clock source through ACLKRCTL(CLKRM) and AHCLKRCTL registers.

  • Hello Richard,

    If I need the McASP receive clock to be 20MHz for an ADC, I determined that the DSP oscillator should also be 20MHz because the AUXCLK divide-down is from the external oscillator, and not from the PLL.  

    I have two questions: (1) Is this determination correct?

    Yes, if you need McASP Rx Clock to be 20MHz, you need to change the external PLL oscillator to 20MHz to get the desired AUXCLK.

    (2) Is there any downside to having a 20MHz external oscillator for the TMSC6745.

    Yes, When you change the external PLL oscillator to 20MHz, you are suppose to change the PLL dividers accordingly to set the desired DSP core clock and peripheral clocks.

    Instead, as Titus mentioned above, you could have an option to use external clock of 20MHz for McASP alone and set the McASP clock control registers.

    Please refer section 24.2 Architecture in device TRM for more details about McASP clocking.

    http://www.ti.com/lit/ug/spruh91b/spruh91b.pdf

    You could also find the below clocking spreadsheet handy.

    http://processors.wiki.ti.com/index.php/File:SYS_CLK_CALC_OMAP-L137_C674X_AM17X_v1p0.zip

    Regards,

    Senthil

  • Hi Richard,

    Thanks for your post.

    Yes, you can configure the CLKRM bit for the receive bit clock ACLKR to be either externally sourced from the ACLKR pin or internally generated. Likewise, you can configure the e HCLKRM bit for the receive high-frequency master clock AHCLKR to be either externally sourced from the AHCLKR pin or it can be internally generated.

    Like same as above, you can configure the McASP Transmit clock too.

    Thanks & regards,

    Sivaraj K

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