• State Resolved
  • Locked Locked
  • Replies 2 replies
  • Subscribers 98 subscribers
  • Views 893 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Interfacing McASP to AD7476

Richard Surprenant
Prodigy 80 points
Other Parts Discussed in Thread: TMS320C6745

Hi,

I am upgrading from a tms320vc5409 to tms320c6745 and would like to interface the McASP to the AD7476.  The McBSP on the 5409 was able to generate the proper chip select which is low for 16 bits and then high for 4 bits.  I cannot find a way to configure the McASP to do the same.  Can anyone provide a suggestion?

This is the ADC I am using:

http://www.analog.com/static/imported-files/data_sheets/AD7476_7477_7478.pdf

The requirements as I see it are as follows.

1) Run the clock at 20MHz to get a 1MHz sampling rate.

2) /CS (framesync) needs to be low for 16-clocks to read the input sample and then high for 4 clocks to re-initiate tracking.

I have placed the McASP in Burst Mode, as I see this is the only alternative to I2S mode, but I can only seem to get a single pulse framesync.

I would appreciate any suggestions.

Thanks,

Rich

  • 0
    TI__Mastermind 35645 points

    Hi,

    Thanks for your post.

    I would recommend you to download quickStartOMAPL1x_rCSL_2.0 package from the below wiki, by which you have the McASP Echo register Chip Support Library ( rCSL) example which is a non-OS based example of how to use the C674x DSP with the McASP to receive and transmit 24 bit audio data using I2S protocol with AIC3106 audio codec. 

    http://processors.wiki.ti.com/index.php/QuickStartOMAPL1x_rCSL#Example_Synopsis

    You could use the above example as reference to configure McASP with AD7476 and appropriately configure the AD7476 codec registers through its codec datasheet instead of AIC3106.. This example would be a best starterware example to start with for C6745's McASP interfacing with any ADC.

    Also, please refer section 24.2.4.1.2 in the C6745 TRM for the initialization steps to properly configure McASP as below and to configure McASP for burst/TDM mode, kindly refer sections 24.2.4.2.1 & 24.2.4.2.2 from the below TRM doc:

    http://www.ti.com/lit/ug/spruh91b/spruh91b.pdf 

    Thanks & regards,

    Sivaraj K

    ------------------------------------------------------------------------------------------------------

    Please click the Verify Answer button on this post if it answers your question

    -------------------------------------------------------------------------------------------------------

     

  • 0 in reply to Sivaraj Kuppuraj
    Prodigy 80 points

    Sivaraj,

    Thanks for all the help.  After reviewing the sample code and the the suggested TRM, I have decided the McASP cannot properly create the proper frame sync for this SAR ADC.  

    It is probably fine for Codecs but not for SARs.  That is unfortunate because the McBSP can do it fine.  

    On a positive note, I was able to get the SPI to replicate this signal properly.  

    Unfortunately, now that limits me to two ADCs, and I have no high-speed interprocessor communication channel left.

    Rich