I was able to compile and run all the OpenMP+OpenMP examples from MCSDK-HPC on the KeyStone II EVM. I have a few questions about the memory map of the DSP in KeyStone II OpenMP+OpenMP model:
1) For C6678, the amount of cache and L2SRAM memory can be configured using the RTSC platform file. How can this be done on KeyStone II?
2) Is there a documentation on how to use/configure L2SRAM memory of C66x CorePac in KeyStone II for DMA transfers? Currently, I am going through the below links:
http://processors.wiki.ti.com/index.php/OpenMP_OpenCL_DSP_Heap_Management
http://processors.wiki.ti.com/index.php/OpenMP_Accelerator_Model_User%27s_Guide#local_map_type
For me, things were clear in terms of memory management and OpenMP on C6678 using CFG file and RTSC platform file. But I am not sure how to manage the DSP's internal memory with the current OpenMP+OpenMP model in the KeyStone II.
Thank you in advance.
regards,
Barath Ramesh