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AM335x Bootstrapping Resistor Values

Other Parts Discussed in Thread: AM3354, SN75LVDS83B, SN75LVDS83

Hi:

Am using the AM3354 LCD interface with a 800x600 TFT display with and LVDS interface.

The LVDS transmitter chip is an SN75LVDS83B.


The display quality is flawless save for some pixel noise that manifests as a "scintillating" effect. I can see some noise on the LVDS signals superimposed on the data.

First thing I want to eliminate is the values of the bootstrapping resistors that connect to the LCD data lines. I have pads for all of the pullups and pulldowns on this board (as it is a prototype)


I am using 100k resistors for both pullup and pulldown but I notice on the TI TMDSSK3358 eval design, TI is actually using 10k resistors for pulldowns. Just wondering if the added load on those lines makes a difference?

  • The question of whether your board needs or could benefit from the additional load of 10K resistors depends on several factors including board layout, routing distance to the SN75LVDS83B, and any other components you have on these nets.

    Boot strap resistors are only necessary for the selectable boot functions and they are not needed for display driving.

    If your desired boot sequence is being selected properly (and functioning properly) by the 100K resistors, then you should keep those values in since they will dissipate less power.

    Have you ruled out layout issues? Have you tried a static test image from the AM3354 to minimize any other variables that may actually be changing the output image being driven on the AM3354 LCD pins?

  • The external pull resistors required on the LCD_DATA[15:0] signals are used to select the proper boot sequence of the AM335x device and these resistors should not effect signal quality when driving the LCD.

    The value of these pull resistors should be selected based on the worst case input leakage of all inputs connect to these signals and the VIH min and VIL max voltage levels defined in the AM335x data sheet.

    For example, the maximum pull-up value required to pull these inputs above the VIH min voltage is 63k ohms assuming 3.3 volt operation with a min VDD supply of 3.135 volts and no other connection to these terminals.  This resistor value may need to be even smaller if you have other devices connected that have leakage to VSS.  The same is true for the maximum pull-down value.  With the same assumptions, the maximum pull-up value required to pull these inputs above the VIL max voltage is 44k ohms.

    Regards,
    Paul 

  • Hi Guys, thanks for the responses!

    I actually found the problem. Turns out that I need to pull pin 17 on the SN75LVDS83 to GND as opposed to VCC to clock data in on the trailing edge of the input pixel clock. Apparently my LCD data traces are just long enough to run into some marginal timing clk / data issues....

    The noise I was seeing actually turned out to be mostly due to scope probe ground lead inductance