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am1705 EMA_A address pins muxing, used for NAND flash

Dan Edmondson
Intellectual 860 points

Hi all,

Things are working well with nand, no problems. What we are seeing is that once we mux the EMA_A[1] and EMA_A[2] for use as address lines to the nand device, the other unused EMA_A pins will not function as GPIOs even after muxing them to be GPIO.

We don't seem to be able to use GP1[0], GP[3]:GP1[12] with this muxing, these pins always read zero. GP1[13] and GP1[14], the bank address pins, do work as GPIOs. Or seem to. I can change their values from /sys/class/gpio.

I have looked in several places but can't find any documentation on this issue. Is this expected behavior once any address pin is muxed?

Here is a shot from the Pin Setup utility:

thanks,

Dan

  • 0
    Guru 26430 points

    Double check that your board file (arch/arm/mach-davinci/board-da830-evm.c) does not over write your mux config.

  • 0 in reply to Norman Wong
    Intellectual 860 points

    Hi Norman,

    I guess you are referring to this data structure from the board file?

    /*
     * UI board NAND/NOR flashes only use 8-bit data bus.
     */
    static const short da830_evm_emif25_pins[] = {
        DA830_EMA_D_0, DA830_EMA_D_1, DA830_EMA_D_2, DA830_EMA_D_3,
        DA830_EMA_D_4, DA830_EMA_D_5, DA830_EMA_D_6, DA830_EMA_D_7,
        DA830_EMA_A_0, DA830_EMA_A_1, DA830_EMA_A_2, DA830_EMA_A_3,
        DA830_EMA_A_4, DA830_EMA_A_5, DA830_EMA_A_6, DA830_EMA_A_7,
        DA830_EMA_A_8, DA830_EMA_A_9, DA830_EMA_A_10, DA830_EMA_A_11,
        DA830_EMA_A_12, DA830_EMA_BA_0, DA830_EMA_BA_1, DA830_NEMA_WE,
        DA830_NEMA_CS_2, DA830_NEMA_CS_3, DA830_NEMA_OE, DA830_EMA_WAIT_0,
        -1
    };

  • 0 in reply to Dan Edmondson
    Intellectual 860 points

    Thanks for the pointer, Norman!  They are working now. I changed the data structure as follows to match the pin mux.

    /*
     * UI board NAND/NOR flashes only use 8-bit data bus.
     */
    static const short da830_evm_emif25_pins[] = {
        DA830_EMA_D_0, DA830_EMA_D_1, DA830_EMA_D_2, DA830_EMA_D_3,
        DA830_EMA_D_4, DA830_EMA_D_5, DA830_EMA_D_6, DA830_EMA_D_7,
        DA830_EMA_A_1, DA830_EMA_A_2, DA830_NEMA_WE,
        DA830_NEMA_CS_3, DA830_NEMA_OE, DA830_EMA_WAIT_0,
        -1
    };