Problems intergrating H.264 MP v1.14 decoder

Sameer,

The right way to do it would be to define the IMX code in the codec XDC specification file, modify the TCF to add the IMX region and update the cfg to place the code into the IMX region.

The XDC build translates the link.xdt to the standard linker command file format prior to linking.

A *quick hack* would be to try placing the code into IMX buffers from link.xdt itself as follows:

MEMORY {

   IMX_IMGBUF :        o = 0x11104000       l = 0x0000F400
   IMX_IMGBUF_1 :   o = 0x11114000       l = 0x00002000

} 

SECTIONS{

  .text:H264MPVDEC_TI_cSectImx1 > IMX_IMGBUF
  .text:H264MPVDEC_TI_cSectImx2 > IMX_IMGBUF_1

%if (this.H264MPDEC.codeSection) {
    H264MPVDEC_TI_dSect1  > `this.H264MPDEC.codeSection` , align = 128
    H264MPVDEC_TI_dSect2  > `this.H264MPDEC.codeSection` , align = 128
%}

%if (this.H264MPDEC.codeSection) {
    H264MPVDEC_TI_cSect1  > `this.H264MPDEC.codeSection` , align = 0x10000
    H264MPVDEC_TI_cSect2  > `this.H264MPDEC.codeSection` , align = 0x10000
    H264MPVDEC_TI_cSect3  > `this.H264MPDEC.codeSection` , align = 0x10000
    H264MPVDEC_TI_cSect4  > `this.H264MPDEC.codeSection` , align = 0x10000
    H264MPVDEC_TI_cSect5  > `this.H264MPDEC.codeSection` , align = 0x10000
    H264MPVDEC_TI_cSect6  > `this.H264MPDEC.codeSection` , align = 0x10000
    H264MPVDEC_TI_cSect7  > `this.H264MPDEC.codeSection` , align = 0x10000
%}

}

I am assuming you are using DM644x platform. The ARM application might have issues in loading the codec server created. In that case, please use Engine.create in your ARM app cfg file instead of Engine.createFromServer.

Regards,

Anand Balagopalakrishnan

Hi,

Thanks for you reply.

Yes, i am using DM6446 platform and my application cfg uses Engine.create ("decode", ...

I did what you said, i added the configuration in link.xdt, rebuilt the codecs and servers. Did not get any relavant warnings or errors here. Rebuild my application.

However while launching the applicatio i receive the following messages

Error: DSP-side memory map does not match configuration.
Compare DSP-side TCF/MAP file with /dsplink/config/all/CFG_<PLATFORM>.c

The output with CE_DEBUG=3 is http://pastebin.com/68KTKzUs

What changes should i make in the dsp side configuration?

Currently my CFG_DM6446GEM_SHMEM.c file looks like this  http://pastebin.com/Yvjj9U8t

Please help, i have been pondering over this issue with no results

~Regards

Sameer

Hi,

The DSP logs show the following starting at line 102. The following lines give the DSP memory map as seen from ARM. Subsequent to this, the combo server is loaded.

@0,518,032us: [+2 T:0x40ce4b60 S:0x40ce44f4] OP - Processor_create_d> Adding DSP segment #0 to Link configuration: name='DDR2', startAddress=0x8fa00000, sizeInBytes=0x400000, shared=1, syncd=0

@0,518,283us: [+2 T:0x40ce4b60 S:0x40ce44f4] OP - Processor_create_d> Adding DSP segment #1 to Link configuration: name='DSPLINKMEM', startAddress=0x8fe00000, sizeInBytes=0x100000, shared=1, syncd=0

@0,518,520us: [+2 T:0x40ce4b60 S:0x40ce44f4] OP - Processor_create_d> Adding DSP segment #2 to Link configuration: name='RESETCTRL', startAddress=0x8ff00000, sizeInBytes=0x80, shared=1, syncd=0

@0,518,731us: [+2 T:0x40ce4b60 S:0x40ce44f4] OP - Processor_create_d> Adding DSP segment #3 to Link configuration: name='DDRALGHEAP', startAddress=0x88000000, sizeInBytes=0x7a00000, shared=0, syncd=0

Please set the memory map in the ARM application's configuration file as follows. The memory map specified here should match the DSP's memory map created as part of combo server build. The memory map will be available in the server directory in package/cfg/...

This should ensure that the error is resolved.

 engine.armDspLinkConfig = {

  memTable: [
     ["DDRALGHEAP", {addr: 0x88000000, size: 0x7a00000, type: "other"}],
     ["DDR2",       {addr: 0x8FA00000, size: 0x00400000, type: "main" }],
     ["DSPLINKMEM", {addr: 0x8FE00000, size: 0x00100000, type: "link" }],
     ["RESETCTRL",  {addr: 0x8FF00000, size: 0x00000080, type: "reset"}],

    ],
    doPowerControl : false,
  };

Regards,

Anand Balagopalakrishnan