I'm using OMAP4 SPI in slave mode. The master sends data at 96MHz. I would like to know what is the limit of the SPI hardware module to keep up with data at high clock rate.
I know that in master mode, the system is limited to 48MHz. What's the limit in slave mode? I haven't found any information on this in the TRM, only master mode is documented regarding the clock speed and divider.
I have from time to time some "desynchronization" (missing clock) but as such rate, it's hard to figure out where the problem really is (kernel, sdma, spi module, integrity signal, emitter...) and I would like to better understand the spi module itself.
Is there any register to put the SPI module in "good mood" for high clock transfer?
