Numonyx SPI NOR chip support in kernel 3.12

Ankur Tank

We are using beaglebone black based custom board,
We have interfaced Numonyx m25980(1MBIT) chip with Am335x processor's SPI0.

I have added followoing lines in device tree

&spi0{
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&spi0_pins>;
        /* DO is MOSI, D1 is MISO */
        ti,pindir-d0-out-d1-in = <1>;
        m25p80@0 {
                #address-cells = <1>;
                #size-cells = <1>;
                compatible = "st,m25p80";
                reg = <0>;
                spi-max-frequency = <1000000>;
                /*m25p,fast-read;*/
                 partition@12 {
                                label = "spi-nor";
                                reg = <0x0 0x100000>; /* 1M */
                        };

        };
};

i get following message in the kernel bootlog,

[    0.157847] bus: 'spi': registered
[    0.157860] device class 'spi_master': registering
[    0.158319] bus: 'platform': add driver omap_hwspinlock
[    0.174404] device: '480ca000.spinlock': device_add
[    0.174428] bus: 'platform': add device 480ca000.spinlock
[    0.174630] bus: 'platform': driver_probe_device: matched device 480ca000.spinlock with driver omap_hwspinlock
[    0.174648] bus: 'platform': really_probe: probing driver omap_hwspinlock with device 480ca000.spinlock
[    0.174676] omap_hwspinlock 480ca000.spinlock: no default pinctrl state
[    0.174787] driver: '480ca000.spinlock': driver_bound: bound to device 'omap_hwspinlock'
[    0.174802] bus: 'platform': really_probe: bound device 480ca000.spinlock to driver omap_hwspinlock
[    0.177347] device: '48030000.spi': device_add
[    0.177371] bus: 'platform': add device 48030000.spi
[    0.413592] bus: 'spi': add driver m25p80
[    0.633426] device class 'spidev': registering
[    0.633581] bus: 'spi': add driver spidev
[    0.633757] bus: 'platform': add driver omap2_mcspi
[    0.633867] bus: 'platform': driver_probe_device: matched device 48030000.spi with driver omap2_mcspi
[    0.633882] bus: 'platform': really_probe: probing driver omap2_mcspi with device 48030000.spi
[    0.633994] omap2_mcspi 48030000.spi: no sleep pinctrl state
[    0.634008] omap2_mcspi 48030000.spi: no idle pinctrl state
[    0.634123] device: 'spi1': device_add
[    0.634973] device: 'spi1.0': device_add
[    0.635006] bus: 'spi': add device spi1.0
[    0.635284] bus: 'spi': driver_probe_device: matched device spi1.0 with driver m25p80
[    0.635300] bus: 'spi': really_probe: probing driver m25p80 with device spi1.0
[    0.635331] m25p80 spi1.0: no default pinctrl state
[    0.635495] m25p80 spi1.0: found mr25h256, expected m25p80
[    0.635519] m25p80 spi1.0: mr25h256 (32 Kbytes)
[    0.635544] 1 ofpart partitions found on MTD device spi1.0
[    0.635554] Creating 1 MTD partitions on "spi1.0":
[    0.635569] 0x000000000000-0x000000100000 : "spi-nor"
[    0.635581] mtd: partition "spi-nor" extends beyond the end of device "spi1.0" -- size truncated to 0x8000
[    0.636180] driver: 'spi1.0': driver_bound: bound to device 'm25p80'
[    0.636196] bus: 'spi': really_probe: bound device spi1.0 to driver m25p80
[    0.636500] device: 'spi1.1': device_add
[    0.636529] bus: 'spi': add device spi1.1
[    0.636769] driver: '48030000.spi': driver_bound: bound to device 'omap2_mcspi'
[    0.636790] bus: 'platform': really_probe: bound device 48030000.spi to driver omap2_mcspi

when i erase it using following command it works fine but it erases only 32 kibytes
I can see message related to size truncation in the bootlog above but how do i avoid it ?

# flash_erase /dev/mtd12 0 0

Erasing 32 Kibyte @ 0 -- 100 % complete

I think driver is trying to match "m25p80"(from dts) with id in struct spi_device_id m25p_ids[] in m25p80.c.

Do i have to add entry for numonyx m25p80 chip in "struct spi_device_id m25p_ids[]" in m25p80.c file ?

Any suggestions/corrections ?

Thank you,

Regards,
Ankur

over 10 years ago

0 Titusrathinaraj Stalin over 10 years ago

TI__Guru** 116100 points

Hi Ankur,

I think, You have to change/add Ids (sector size etc.,) in driver file located at "drivers/mtd/devices/m25p80.c"for the new SPI NOR chip.

static const struct spi_device_id m25p_ids[] = {

0 Ivan Matrakov over 10 years ago

TI__Expert 4475 points

Hi Ankur,

Please see in the log these lines:


[    0.635331] m25p80 spi1.0: no default pinctrl state
[    0.635495] m25p80 spi1.0: found mr25h256, expected m25p80
[    0.635519] m25p80 spi1.0: mr25h256 (32 Kbytes)


Check again your setting. BTW the clock you have to initialize as I/O.


BR
Ivan

0 Ankur Tank over 10 years ago in reply to Ivan Matrakov

Expert 2985 points

Hi Titus/Ivan,

I was bit confused and there were some hardware issue,
I had received datasheet of numonyx and actual chip was from ST :)
Later there were wrong hardware connections,

After correcting hardware correction SPI NOR is getting detected.
I could write to SPI Nor flash and i could read it back from it.
I used following devicetree format,

&spi0{
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&spi0_pins>;
        /* DO is MOSI, D1 is MISO */
        ti,pindir-d0-out-d1-in = <1>;
        m25p80@0 {
                #address-cells = <1>;
                #size-cells = <1>;
                compatible = "st,m25pe80";
                reg = <0>;
                spi-max-frequency = <1000000>;
                /*m25p,fast-read;*/
                 partition@12 {
                                label = "spi-nor-spl1";
                                reg = <0x0 0x20000>; 
                        };
                 partition@13 {
                                label = "spi-nor-spl2";
                                reg = <0x20000 0x20000>; 
                        };
                 partition@14 {
                                label = "spi-nor-spl3";
                                reg = <0x40000 0x20000>; 
                        };
                 partition@15 {
                                label = "spi-nor-spl4";
                                reg = <0x60000 0x20000>; 
                        };

                partition@16 {
                                label = "spi-nor-spl4";
                                reg = <0x80000 0x80000>; 
                        };

        };
};

I see mtd12, mtd13, mtd14, mtd15 & mtd16 device files being created under /dev directory,
There is two issues
1. When i erase mtd12 partition it is erasing only 64kb, actually it should erase 128kb.Erase block size is 64Kib.
I have to see why that is happening.

2. we are not able to boot from SPI-NOR flash.
Is AM335x supports booting SPL from SPI Nor flash ?

We are using SB4:0 - 00110 ( EMAC, SPI, NAND, NANDI2C) boot sequence to boot from SPI Nor,
We don't connect Ethernet cable so board should try to boot from SPI but it doesn't boot.
If we have binaries in NAND then board boots from NAND, but if we erase NAND board doesn't boot.

Any help/suggestions/pointer please ?

Thank you,

Regards,
Ankur

0 Ankur Tank over 10 years ago in reply to Ankur Tank

Expert 2985 points

I fogot to put the output of erase command, here it is,

# flash_erase /dev/mtd12 0 0
Erasing 64 Kibyte @ 10000 -- 100 % complete

Regards,
Ankur

0 Biser Gatchev-XID over 10 years ago in reply to Ankur Tank

TI__Guru**** 393215 points

How is the SPI flash connected? To boot from it connections should be as shown in Table 26-30 from the AM335X TRM Rev. K. See also section 26.1.7.6.1 to determine if this SPI flash is compatible.

0 Ankur Tank over 10 years ago in reply to Biser Gatchev-XID

Expert 2985 points

Hi Biser,

Thank you for reply,
I checked the connection and they are fine, we are using SPI0 only,
I checked the datasheet of the ST-M25PE80 and looks to be supported chip,

I srated taking waveforms on the chipselect line and i see chip select being made low by ROM code but somehow it doesn't read it.
I m not sure what i am missing there. :(

Thank you,

Regards,
Ankur

0 Biser Gatchev-XID over 10 years ago in reply to Ankur Tank

TI__Guru**** 393215 points

Have you checked the state of all SPI Flash control signals at boot time? This flash has a reset signal for example.

0 Ankur Tank over 10 years ago in reply to Biser Gatchev-XID

Expert 2985 points

Hi Biser,

Thank you for reply,
We have connected reset & TSL/W pins to VCC, So they should not be creating issue,
Moreover with the same pin configuration erase/read/write works in kernel, so i am not sure what is going wrong.

Regards,
Ankur

0 Biser Gatchev-XID over 10 years ago in reply to Ankur Tank

TI__Guru**** 393215 points

Do you see activity on MOSI and MISO lines at boot time?

0 Ankur Tank over 10 years ago in reply to Biser Gatchev-XID

Expert 2985 points

Hi Biser,

I had seen chipselect & Clock(~11 Mhz) being sent by ROM code,
I will tap MISO & MOSI update you,

Thank you,

Regards,
Ankur

0 Ankur Tank over 10 years ago in reply to Ankur Tank

Expert 2985 points

Hi Biser,

As you suggested we took waveforms of MOSI & MISO and found that they were behaving exactly opposite.

There were two issues here,
1. There is different command to generate MLO.byteswap which is bootable from SPI Nor flash.
   Refererence : http://processors.wiki.ti.com/index.php/AM335x_U-Boot_User%27s_Guide#Building_U-Boot
2. And we weren't using the default configuration of the SPI0 lines,
   By default SPI0_D0 is input(MISO) and SPI0_D1 is output(MOSI), we were using it otherway.
   So we changed PIN MUX & device tree as follows and it started working.

spi0_pins: pinmux_spi0_pins{
                        pinctrl-single,pins = <
                                0x150 0x30 /* spi0_sclk, INPUT_PULLUP | MODE0 */
                                0x154 0x30 /* spi0_d0,INPUT_PULLUP | MODE0 */
                                0x158 0x10 /* spi0_d1, OUTPUT_PULLUP | MODE0 */
                                /* For SPI NOR flash*/
                                0x15c 0x10 /* spi0_cs0, OUTPUT_PULLUP | MODE0 */
                        >;
                };

&spi0{
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&spi0_pins>;
        /* DO is MOSI, D1 is MISO */
        /*ti,pindir-d0-out-d1-in = <0>;*/
        m25p80@0 {
                #address-cells = <1>;
                #size-cells = <1>;
                compatible = "st,m25pe80";
                reg = <0>;
                spi-max-frequency = <1000000>;
                /*m25p,fast-read;*/
                 partition@12 {
                                label = "spi-nor-spl1";
                                reg = <0x0 0x20000>; /* 128k */
                        };
                 
        };
};

After making above changes we are able to boot SPL from spi-nor flash.
Hope it helps someone facing similar issue.

Thank you,

Regards,
Ankur

0 Biser Gatchev-XID over 10 years ago in reply to Ankur Tank

TI__Guru**** 393215 points

Hi Ankur,

Glad to hear you solved the issue. And thanks for sharing your results on the forum!

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Numonyx SPI NOR chip support in kernel 3.12