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Cannot write to TCRR for Timer 2 (GPT)

Ayaz Shahid
Prodigy 140 points


Hi,

I have an OMAP5432 board and I'm trying to use General Purpose Timer 2. I'm able to program it properly but when I write the timer counter value to TCRR, it doesn't change anything. It appears that somehow this register is in readonly mode perhaps?

I've tried placing the load value in TLDR and triggering TRGR but that that didn't work either. 

Can someone explain why I can't write to TCRR? because the manual says it can be written both on the fly and when timer is sopped.

  • 0
    TI__Guru**** 161600 points

    Hi Ayaz,

    What OS are you using? Do you observe this behaviour on other 1ms tick timers?

    Did you verify that the timer is not used by another subsystem in the SoC (like Ducati, Sys-BIOS, etc...) ?

    Best Regards,

    Yordan

  • 0 in reply to Yordan Kovachev
    Prodigy 140 points

    Hey Yordan,

    I'm using it from bare-metal context. My board is initialized by uboot.

    I've let the timer run for a but and I observed that the TCRR gets loaded properly with the value in TLDR once it gets rolled over (I'm using AutoReload). But I just don't have write access to TCRR which is pretty weird since its a RW register. 

  • 0 in reply to Ayaz Shahid
    TI__Guru**** 161600 points

    Ayaz,

    Could you check Section 22.2.4.5.1 1-ms Tick Generation (Only TIMER1, TIMER2, and TIMER10), especially consider the part that states:
    "The TPIR, TNIR, and TCVR registers and adders Add1, Add2, and Add3 are used to define whether the next value loaded in the timer counter register (the TCRR[31:0] TIMER_COUNTER bit field) is the value of the TLDR[31:0] LOAD_VALUE bit field (period less than 1 ms) or the value of TLDR[31:0] LOAD_VALUE –1 (period greater than 1 ms).
    Table 22-6 lists the value loaded in the TCRR according to the sign of the result of Add1, Add2, and Add3."

    Maybe your settings violate the 1ms tick generation.

    An example of properly configured (initialized) 1ms tick timer (TIMER1) can be found in the following thread:

    http://e2e.ti.com/support/omap/f/849/p/325613/1187775.aspx  (see the settings in the last post).

    Best Regards,
    Yordan