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CSL 3.04 bugs

Other Parts Discussed in Thread: TMS320C5505

C55XCSL-LOWPOWER TMS320C55x Chip Support Library  3.04.00.02
Target: TMS320C5505
Static Analysis Tool: Coverity 7.0.0

Development Environment: Code Composer Studio v5.5

csl_sar.c
line 337
The handle hSar is used before checking if it is a NULL pointer.
CSL_Status  SAR_chanClose (SAR_Handle      hSar)
{

    hSar->chanNo = CSL_SAR_NO_CHAN;
    if(NULL == hSar)
    {
        return CSL_ESYS_BADHANDLE;
    }
    ...
}

line 1701
The handle hSar is checked to make sure it is not NULL, but the function continues regardless.
If hSar is NULL, the field extraction call will still try to use it.
Bool SAR_getStatus(CSL_SarHandleObj *hSar, CSL_Status *status)
{
    volatile Bool busyBit = CSL_SAR_ADC_BUSY ;
    if(NULL == hSar)
    {
        *status = CSL_ESYS_BADHANDLE;
    }
#if (defined(CHIP_C5517))
    busyBit = CSL_FEXT (hSar->baseAddr->SARDATA, SAR_SARDATA_ADCBSY) ;
#else
 busyBit = CSL_FEXT (hSar->baseAddr->SARDATA, ANACTRL_SARDATA_ADCBSY) ;
#endif
    *status = CSL_SOK;
    return busyBit;
}

csl_i2s.c
line 557
It is possible for variable "latency" to remain uninitialized by the time it is used on line 557.
If default case in the switch statement below is executed because of a word length value not covered by the case statements, "latency" will not be initialized.
CSL_Status I2S_read (CSL_I2sHandle hI2s, Uint16 *readBuff, Uint16 buffLen)
{
...
 Int16  latency;
...

 if ((hI2s->firstRead == TRUE) && (hI2s->opMode == I2S_POLLED))
 {
  hI2s->firstRead = FALSE;

  if (hI2s->loopBackMode == I2S_LOOPBACK_ENABLE)
  {
   if (hI2s->datapack == I2S_DATAPACK_ENABLE)
   {
    switch(hI2s->wordLen)
    {
         case I2S_WORDLEN_8:
      if(hI2s->fsDiv == I2S_FSDIV8)
      {
       latency = CSL_I2S_LATENCY_6;
      }
      else
      {
       latency = CSL_I2S_LATENCY_5;
      }

      break;

         case I2S_WORDLEN_10:
         case I2S_WORDLEN_12:
         case I2S_WORDLEN_14:
         case I2S_WORDLEN_16:
      latency = 6;
      break;

     default:
      break;
    }
   }
   else
   {
    latency = CSL_I2S_LATENCY_2;
   }
  }
  else
  {
   switch(hI2s->wordLen)
   {
        case I2S_WORDLEN_8:
        case I2S_WORDLEN_18:
        case I2S_WORDLEN_20:
        case I2S_WORDLEN_24:
        case I2S_WORDLEN_32:
     latency = CSL_I2S_LATENCY_2;
     break;

        case I2S_WORDLEN_10:
        case I2S_WORDLEN_12:
        case I2S_WORDLEN_14:
        case I2S_WORDLEN_16:
     latency = CSL_I2S_LATENCY_3;
     break;

    default:
     break;
   }
  }

  /* Ignore the first few frames */
  while(latency > 0)
  {
                ...
...
}


csl_i2s.c
line 173
The default case in the switch statement below cannot be reached (dead code) because i2sInstNum is constrained before the switch statement.
CSL_I2sHandle I2S_open(I2S_Instance i2sInstNum, I2S_OpMode opMode, I2S_ChanType chType)
{
...
 if((i2sInstNum >= 0) & (i2sInstNum <= 3))
 {
         ...

  /* Set Instance hardware registers*/
  switch(i2sInstNum)
  {
   case I2S_INSTANCE0:
                                ...
    break;
#if (!(defined(CHIP_C5517)))
   case I2S_INSTANCE1:
    ...
    break;
#endif
   case I2S_INSTANCE2:
    ...
    break;
   case I2S_INSTANCE3:
    ...
    break;
   default:
    break;
  }
 }
...
}

csl_dma.c
line 2421
It is possible for variable "txferStatus" to remain uninitialized by the time it is returned by the function.
There is no default case in the switch statement below. If a channel other than 0, 1, 2, or 3 is specified, txferStatus will not be initialized.
Bool DMA_getLastTransferType (CSL_DMA_Handle hDMA, CSL_Status *status)
{
 Bool      txferStatus;
...

 switch(chanNum)
        {
#if (defined(CHIP_C5517))
      case CSL_DMA_CHAN0:
    txferStatus = CSL_FEXT(hDMA->dmaRegs->DMACH0TCRU,
                           DMA_DMACH0TCRU_LTSTATUS);
           break;
      case CSL_DMA_CHAN1:
    txferStatus = CSL_FEXT(hDMA->dmaRegs->DMACH1TCRU,
                           DMA_DMACH1TCRU_LTSTATUS);
           break;

      case CSL_DMA_CHAN2:
    txferStatus = CSL_FEXT(hDMA->dmaRegs->DMACH2TCRU,
                           DMA_DMACH2TCRU_LTSTATUS);
           break;

      case CSL_DMA_CHAN3:
    txferStatus = CSL_FEXT(hDMA->dmaRegs->DMACH3TCRU,
                           DMA_DMACH3TCRU_LTSTATUS);
           break;
#else
      case CSL_DMA_CHAN0:
    txferStatus = CSL_FEXT(hDMA->dmaRegs->DMACH0TCR2,
                           DMA_DMACH0TCR2_LTSTATUS);
           break;
      case CSL_DMA_CHAN1:
    txferStatus = CSL_FEXT(hDMA->dmaRegs->DMACH1TCR2,
                           DMA_DMACH1TCR2_LTSTATUS);
           break;

      case CSL_DMA_CHAN2:
    txferStatus = CSL_FEXT(hDMA->dmaRegs->DMACH2TCR2,
                           DMA_DMACH2TCR2_LTSTATUS);
           break;

      case CSL_DMA_CHAN3:
    txferStatus = CSL_FEXT(hDMA->dmaRegs->DMACH3TCR2,
                           DMA_DMACH3TCR2_LTSTATUS);
           break;
#endif
        }
    }

 return (txferStatus);
}


csl_dma.c
line 93
Field insert statements using a shift of 0 bits and a mask of 0xFFFF do not affect the result.
Here is one example:
CSL_Status DMA_init (void)
{
    /* Set the reset clock cycle */
 CSL_FINS(CSL_SYSCTRL_REGS->PSRCR, SYS_PSRCR_COUNT,
          CSL_DMA_RESET_CLOCK_CYCLE);