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C665x unexpected operation during EMIF NOR booting

RY9983
Guru 10570 points

Hello,

One of my important customer made their custom C6655 board.
And, they are evaluating EMIF16 NOR boot on it.

They are putting loop forever operation code (0x00000012) on EMIF base address (0x70000000).
And, they can see PC jumps to the address (0x70000000) after reset.
But, actual operation is unexpected. It just pass through the loop forever.

When I put the same operation code (0x00000012) in internal RAM area, expected operation can be observed.(Loop forever)

Question)
- Have you ever encountered the issue like this?
- Is there any restriction at 0x70000000?

Any advise would be appreciate.

Best regards, RY

  • 0
    Guru 10570 points

    Hello,

    This problem have not been cleared yet.
    I have one question.

    My understanding is :

    RBL jump to 0x70000000, and C66x cpu just executes instruction from 0x70000000.
    Is that correct?
    Please give us advise if some headers are needed or Not on beginning of the NOR flash.

    Best regards, RY

     

  • 0 in reply to RY9983
    TI__Guru** 116170 points

    Hi RY,


    You need to have your image in the right binary format to execute boot image from EMIF NOR. Please refer to the entire process of creation of the image mentioned on the discussion here:

    http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/367102.aspx

    Let us know if you have any follow up questions regarding this.

    Regards,

    Rahul

  • 0 in reply to Rahul Prabhu
    Guru 10570 points

    Rahul-san,

    I appreciate your response!
    I understand C66x performs instruction from base of CS(0x70000000).
    I am gonna visit to our customer and debug with them to check if CPU operate assembly instruction correctly.
    Thanks!
    Best regards, RY

  • 0 in reply to RY9983
    Guru 10570 points


    Rahul-san,

    Hello.
    I found causing of this issue.
    When I modified binary code like following, I could see expected operation.
    And I also could reproduce it in SRAM area.

    False operation A): "B" instruction is ignored
      B 0x70000000
      NOP 5
      .word 0xFFFFFFFF
      || .word 0xFFFFFFFF
      || .word 0xFFFFFFFF
      || .word 0xFFFFFFFF
      || .word 0xFFFFFFFF
      || .word 0xFFFFFFFF

    False operation B): "B" instruction is ignored
      B 0x70000000
      NOP 5
      NOP
      NOP
      NOP
      NOP
      NOP
      .word 0xFFFFFFFF

    Expected operation: C66x operate loop infinite
      B 0x70000000
      NOP 5
      NOP
      NOP
      NOP
      NOP
      NOP
      NOP

    Question)
    Therefore, we are guessing that:

    - Undefined operation code("|| .word 0xFFFFFFFF") corrupts CPU operation.
    - Since instructions are always fetched 8 words at a time,
    undefined operation code must NOT be placed in 8 words.

    Is my understanding correct?

    We are looking for the description of its restriction in the User's guide.
    If you know the place, please let me know.

    Best regards, RY