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TMS320C6657 chip selects for NOR Flash

Bernhard Boehmer
Expert 1130 points
Other Parts Discussed in Thread: TMS320C6657

We are interested in booting from NOR Flash (Spansion's S29GL256S90DHI020) for the TMS320C6657.

1) In sprs814a, Table 2-7 on page 28 describes the function for bits 7-6. Should the last line "4 = CS5" not actually read "3 = CS5"? Representing '4' would require three bits.

2) Since the TMS320C6657's EMIF chip enable pins are named nEMIFCE[3:0], should Table 2-7 not therefore actually read:

0 = nEMIFCE0
1 = nEMIFCE1
2 = nEMIFCE2
3 = nEMIFCE3

I see that one of the corrections resulting in Revision A of the datasheet was similar (on page 227): "Updated EMIF16 CS[5:2] to CE[3:0] (Page 201)".

sprugz3a has a "Note" relating to this mapping on page 3-3, but this is in the NAND section and thus not obvious or apparently relevant to NOR Flash nor to sprugz3a chapter 2. There seems to be no TMS320C6657 document directly relating CS[5:2] to nEMIFCE[3:0] for NOR Flash.

3) Please therefore confirm that the TMS320C6657 will indeed respect the BOOTMODE[7:6] pins and boot NOR Flash with default timings.

4) Or is there any reason that might require the NOR device's nCE be connected to either to the nEMIFCE2 or CS2 (nEMIFCE0). Previous TI devices used to require NOR Flash from nCS2. Which nEMIFCE is safest to use for NOR Boot if using only one?

  • 0
    TI__Mastermind 42545 points

    Hi Bernhard,

    I'm sorry for the confusion. The internal documentation for the EMIF16 IP uses CS5, CS4, CS3 and CS2 for the asynchronous memory interface. These were renumbered as EMIFCE3, EMIFCE2, EMIFCE1 and EMIFCE0 respectively for the C6657 data manual.

    1&2) You are correct in your assumption that the last line should read "3 = EMIFCE3" and the selection table should read as you've shown in number two of your questions. SPRUGZ3A was generated from internal documentation that referred to the asynchronous memory interfaces as CS5-CS2. The note was added in lieu of correcting the entire document.

    3) C6657 will use the BOOTMODE[7:6] pins to select the EMIFCEx used to boot as you have specified in number 2 above. 

    4) The NOR flash used for boot can be connected to any of the four EMIFCEx outputs. A majority of testing for the part was done on EMIFCE0. If you are going to choose one of the four, I would recommend that you use EMIFCE0.

    Regards, Bill

  • 0 in reply to Bill Taboada
    Expert 1130 points

    Hello Bill, thank you for your prompt and informative reply. Do you think we could get the documentation improved?

    Also the fact that the EMIF16's A0 corresponds to 32-bit data boundaries is poorly documented, I think. I have not seen any mention of this in official documentation for the C665x, only in this forum. In the absence of this context, the wording in sprugz3a on pg. 2-5 that "EMIFA[23:22] behave as address selects" is not very informative. I would urge TI to improve this so that designers are not forced to pour over this forum in attempt to make sense of the function.

    Also in sprugz3a in Figure 2-2 on pg. 2-4, nEMIFBE[1:0] are seemingly presented as being required for NOR Flash, whereas these pins are actually not used in the case of NOR Flash is confusing and not up to the usual TI documentation standards of days gone by. Please may I also request that this be improved in order to assist designers new to this part and lessen the amount of requests to and time spent in this forum (the assistance in which - given the situation - is great, thank you very much).