Champs,
In DM365, is L1 set to cache (not RAM) in just after the power on?
Best regards,
Hideaki Maeda
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Hideaki,
I will check with some of our development teams in TIIndia and will get back to you.
regards,
miguel
Hideaki,
What L1? I believe the ARM9 core has dedicated local RAM and dedicated instruction and data caches. The caches cannot be configured as RAM like one might be able to do on our C6x DSP megamodules.
Regards, Daniel
I'm sorry it was DM6745 not DM365.
May I think L1 in case of DM6745 to be chache?
Best regards,
Hideaki Maeda
Hideaki,
There is no DM6745 device, however there is a C6745 device, in any case I am not familiar with that device, I will move this post to that forum so that right experts will help you there.
regards,
miguel