I am using the PCIe example code under "C:\ti\pdk_C6678_1_1_2_6\packages\ti\drv\pcie\example\sample" and "pcie_sample.c" to understand how to interface C6678 (RC) to our SPARTAN6 FPGA (EP) using the PCIe. In the example, they are using C6678 EVM and address translation is enabled. in my case, we instantiated a 4K DPRAM and want to read the contents into the C6678 Multicore shared memory or DDR3 so all cores can access the same data. Any advice on how to change the code to achieve this specially the address translation part?
Regards,
Murad