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C6713 interfaces to FPGA through EMIF

 

Hi,

I have a custom made DSP Board.

C6713 is connected to FPGA through EMIF in CE3  space. The FPGA is connected to LCD.

C6713  --> FPGA --> LCD

 

I have a situation where the LCD has to be controlled by C6713 and not by FPGA.

I want to control the LCD through C6713 , the FPGA will be programmed to just route the lines from the DSP to LCD.

considering the LCD is a 12*6 character LCD with the Hardware driver on it !

 

How can this be done ? Which register do I have to configure ?

 

Any suggestions / advices will be very much appreciated !!

Thanks in advance.

 

Regards

Stevean

 

 

  • You first need to determine what the interface is on the LCD to control it and update it.  If the interface on the LCD is a parallel, asynchronous interface, you have a good chance that a connection to the EMIF (even through "wires" in the FPGA) will work.

    However, if the LCD interface is I2C, or SPI, connection to the EMIF will not be appropriate.  The EMIF is intended to connect to memory, or memory-like registers in your FPGA for instance.  You can not arbitrarily change its signaling behavior.  I would stipulate that is what would be the function of your FPGA, ie. to convert from the EMIF signaling to something that you need for connection to other things like your LCD.

    So, getting back to the original question: What is the interface on the LCD?

  • Hi Brandon

    Thank you very much for the reply.

    I am using the following LCD

    http://pdf1.alldatasheet.com/datasheet-pdf/view/165398/VARITRONIX/MDL-16265.html

    It has a controller on it which will control and update the LCD.

    The connections on my board are as follows (few signals missings)

    ----------------------------------------------------------------------------------------------------->

    ------------+                                            +---------------+                          +--------
    c6713    |                                              |    FPGA       |                           |   LCD
                   |                                              |                      |    DB[0:7]         |
                   |    ED[0:15]                          |                      |    E                    |
                   |    EA[2:21]                           |                      |    R/W               |
                   |    BUSREQ                         |                      |    RS                 |
                   |    HOLD                               |                      |                          |
                   |    HOLDA                             |                      |                          |        
                   |    CLKOUT3                        |                      |                          |        
                   |    and other signals           |                      |                         |        
                   |    as required                      |                      |                         |
    -----------+                                              +---------------+                        +--------
        
                
    The FPGA is mapped to the CE2 and CE3 space from the C6713.

    As mentioned earlier the FPGA should behave just as wire. It will just map the input lines which ever is carrying data to the db[0:7].
    Few FPGA pins are connected to E,R/W,RS pins !

    How could I control the LCD from C6713 ? Even I find this bit weired but I have to make it work !

    Could you please provide suggestions / advices. It will be very much appreciated.

    Thanks in advance

    Regards
    Stevean

     

     

     

  • The key thing to understand is what the signals mean, what the timing diagram looks like, etc. for the LCD interface.

    I didn't ascertain this information from the 1-page datasheet you had above.  If you have information on the controller used in the LCD panel and a description of the signals with a timing diagram, then this gets us a lot further in understanding how to properaly interface to the LCD.

  • Hi Brandon


    Thank you for the reply ! Yes, I agree it doesn't make much sense with one page document ! ;-)

    KS0070B is the controller for the LCD module.

    Now that I am aware of the instructions, signal description and the timing diagram. This is what I plan to do !

    I map the following signals on the FPGA memory location which is connected to CE2 and CE3 space through EMIF.
    DB0-DB7, R/W, RS, E

    Then I write the required value into this memory from DSP and then the FPGA will just write these values onto the respective pins which are connected to the the LCD modules

    What do you think about this ? or do you have another idea ?

    Kindly do suggest  !

     

    Thanks in advance.

     

    Regards

    Stevean

     

  • Stevean said:

    I map the following signals on the FPGA memory location which is connected to CE2 and CE3 space through EMIF.
    DB0-DB7, R/W, RS, E

    Then I write the required value into this memory from DSP and then the FPGA will just write these values onto the respective pins which are connected to the the LCD modules

    What do you think about this ? or do you have another idea ?

    Your plan seems appropriate.

  • Brandon, Thank you for the reply . I will get back to you soon  !

    Thanks once again !

  • Hi Steve,

    How do you make your own daughtercard? Where can I purchase one from? Am kinda doing a similar project as you with the 6713 board

    cheers,

    Jason