I would like to set up an FPGA and C6678 to communicate via EMIF16 with the FPGA acting as NOR flash. I have read the EMIF16 document sprugz3a and am confused about a few things:
- There is a lot of documentation for NAND flash but NOR is mentioned only a few times.
- What is NOR "page mode" and why does it need to be enabled in a register? What happens if you don't enable it? Does NOR only write one word at a time to an address vs four or eight words at a time?
- Which registers are necessary to configure? Right now I have my eyes on A1CR and PMCR.
I also noticed that the PDK contains EMIF code for NAND flash in evmc66x_nand.h but not for NOR flash. The NOR code uses SPI. Would NOR code for EMIF be the same as NAND code?
mcsdk_2_01_02_06, pdk_C6678_1_1_2_6, TMDSEVM6678LE Rev 3B, Code Composer Studio v 5.5.0.00077,