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Setting up EMIF16 for NOR page mode on C6678

I would like to set up an FPGA and C6678 to communicate via EMIF16 with the FPGA acting as NOR flash. I have read the EMIF16 document sprugz3a and am confused about a few things: 

  1. There is a lot of documentation for NAND flash but NOR is mentioned only a few times. 
  2. What is NOR "page mode" and why does it need to be enabled in a register? What happens if you don't enable it? Does NOR only write one word at a time to an address vs four or eight words at a time?
  3. Which registers are necessary to configure? Right now I have my eyes on A1CR and PMCR. 

I also noticed that the PDK contains EMIF code for NAND flash in evmc66x_nand.h  but not for NOR flash. The NOR code uses SPI. Would NOR code for EMIF be the same as NAND code? 

mcsdk_2_01_02_06, pdk_C6678_1_1_2_6, TMDSEVM6678LE Rev 3B, Code Composer Studio v 5.5.0.00077, 

  • Hi Andrew,

    Welcome to the TI E2E forum. I hope you will find many good answers here and in the TI.com documents and in the TI Wiki Pages (for processor issues). Be sure to search those for helpful information and to browse for the questions others may have asked on similar topics (e2e.ti.com).

    Please refer below post from Rahul for simple example of NOR writer that is connected to the EMIF16.

    http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/p/330496/1153703.aspx#1153703

    Thank you.

  • I looked at the code you linked to and found that they configure only the A1CR register to initialize the EMIF16 NOR and the method of access in SectorBlankCheck() seems to be "read directly from a memory address". Nothing fancy. Given these assumptions, I produced this program below, but we used Chipscope on the FPGA and it is reporting that the C6678 is not outputting anything on the CE1 line. Clearly something is wrong. 

    /*
    	This program writes to some test registers on an FPGA via the EMIF16.
     */
    
    #include <stdio.h>
    #include "platform_internal.h"
    
    
    /* FPGA registers */
    #define REVISION_ID    ((volatile uint8_t*)0x74000000)
    #define REVISION_DATE  ((volatile uint8_t*)0x74000002)
    #define TEMP1          ((volatile uint16_t*)0x74000004)
    #define TEMP2          ((volatile uint16_t*)0x74000006)
    
    void emifInit(){
    	/*  FOR CE1  */
    	hEmif16Cfg->A1CR = (0                                         \
    	  | (1 << 31)     /* selectStrobe */ \
    	  | (0 << 30)     /* extWait */ \
    	  | (1 << 26)     /* writeSetup  12 ns */ \
    	  | (3 << 20)     /* writeStrobe 24 ns */ \
    	  | (0 << 17)     /* writeHold    6 ns */ \
    	  | (1 << 13)     /* readSetup   12 ns */ \
    	  | (7 << 7)      /* readStrobe  48 ns */ \
    	  | (0 << 4)      /* readHold     6 ns */ \
    	  | (1 << 2)      /* turnAround  12 ns */ \
    	  | (1 << 0));    /* asyncSize   16-bit bus */ \
    
    }
    int main(void) {
    	printf("EMIF16 test\n");
    	
    	emifInit();
    
    	/* Test read from FPGA registers */
    	printf("%x \n", *REVISION_ID);
    	printf("%x \n", *REVISION_DATE);
    	printf("%x \n", *TEMP1);
    	printf("%x \n", *TEMP2);
    
    	/* Test write into some FPGA registers */
    	*TEMP1 = 0xA0A0;
    	*TEMP2 = 0x1234;
    
    	/* Test read again */
    	printf("%x \n", *TEMP1);
    	printf("%x \n", *TEMP2);
    
    	while(1);
    }

  • Hello Andrew,

    Have you tried the norwrite code attached in the above post ?

    You need to configure the EMIF for NOR using function norEnableRegion(csRegion). After doing this, you will get the CS signal.

    Regards,
    Senthil