AM335X DCAN EDMA

Catherine

Prodigy 160 points

Other Parts Discussed in Thread: AM3359

Hi,

We use a phytec product : Phycore AM335x with am3359 Processor.

We have generate the linux BSP with Buildroot 05.2013 and the patch from phytec :

ftp://ftp.phytec.de/pub/Products/phyCORE-AM335x/Linux/PD13.1.2/

I want to extend my own kernel driver for the DCAN with EDMA use.

I want to use the IF3 for the DCAN0 -> it means channel 47 of the EDMA.

I use the API of the edma to initialise the DMA transfer :

      dev->edmaCh = edma_alloc_channel(47,callback1,dev,EVENTQ_DEFAULT);
      if(dev->edmaCh < 0)
      {
         return -1;
      }

      edma_set_src (dev->edmaCh, (unsigned long)(dev->phys_base + 0x144), INCR, W8BIT);
      edma_set_dest (dev->edmaCh, (unsigned long)(dev->dmaphysdest1), INCR, W8BIT);
      edma_set_src_index (dev->edmaCh, 0, 0);
      edma_set_dest_index (dev->edmaCh, 0, 0);
      /* A Sync Transfer Mode */
      edma_set_transfer_params (dev->edmaCh, 20, 1, 1, 1, ASYNC);

      /* Enable the DMA Interrupts */
      edma_read_slot (dev->edmaCh, &param_set);
      param_set.opt |= (1 << ITCINTEN_SHIFT);
      param_set.opt |= (1 << TCINTEN_SHIFT);
      param_set.opt |= EDMA_TCC(EDMA_CHAN_SLOT(dev->edmaCh));
      edma_write_slot (dev->edmaCh, &param_set);

      edma_start(dev->edmaCh);

I expect that the DMA transfer will wait on the event-triggered transfer request from the channel 47.

But it is not the case ! I receive a DMA_COMPLETE in my callback just after the call of the edma_start() function.

What is wrong ? do I forget something ?

Catherine

over 10 years ago

0 Biser Gatchev-XID over 10 years ago

TI__Guru**** 393215 points

Hi Catherine,

Which Linux version are you using?

0 Catherine over 10 years ago in reply to Biser Gatchev-XID

Prodigy 160 points

Hi Biser,

I use linux kernel 3.2

Catherine

0 Biser Gatchev-XID over 10 years ago in reply to Catherine

TI__Guru**** 393215 points

I will forward this to the Linux team.

0 Catherine over 10 years ago in reply to Biser Gatchev-XID

Prodigy 160 points

Thank you !

best regards,

Catherine

0 Schuyler Patton over 10 years ago in reply to Catherine

TI__Mastermind 40080 points

The core driver code for the can interface was not written by TI, the core used in the SOC was licensed from Bosch and was written by Bosch representatives. TI cannot comment at this time on the feasibility of adding DMA support since the core code does not implement a DMA feature.

Since the messages are limited to less than 14 bytes what is the desire for adding DMA capability?

0 Catherine over 10 years ago in reply to Schuyler Patton

Prodigy 160 points

I have write my own driver and want to extend it with DMA.

The goal is to reduce the CPU load (interrupts) when a lot of CAN messages is receive.

My problem is that the EDMA don't wait for the DCAN external trigger to do the DMA transfert.

When I call the edma_start() on the channel 47, the Callback function is called with DMA_COMPLETE !

0 Catherine over 10 years ago in reply to Catherine

Prodigy 160 points

Hi !

I found the solution :

I add the following :

--- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
@@ -689,11 +689,19 @@
 	{ .irq = -1 }
 };
 
+static struct omap_hwmod_dma_info am33xx_dcan0_edma_reqs[] = {
+	{ .name = "d_can_if1dma", .dma_req = AM33XX_DMA_DCAN_1, },
+	{ .name = "d_can_if2dma", .dma_req = AM33XX_DMA_DCAN_2, },
+	{ .name = "d_can_if3dma", .dma_req = AM33XX_DMA_DCAN_3, },
+	{ .dma_req = -1 }
+};
+
 static struct omap_hwmod am33xx_dcan0_hwmod = {
 	.name		= "d_can0",
 	.class		= &am33xx_dcan_hwmod_class,
 	.clkdm_name	= "l4ls_clkdm",
 	.mpu_irqs	= am33xx_dcan0_irqs,
+	.sdma_reqs	= am33xx_dcan0_edma_reqs,
 	.main_clk	= "dcan0_fck",
 	.prcm		= {
 		.omap4	= {

then it works !

Thanks

Catherine

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AM335X DCAN EDMA