How to use the L2RAM?

Lisong Xu1

Prodigy 160 points

I have write a project, it is used well in simulation?

when I make the project start from flash, it does not work.

The cmd file is:

-l rts67plus.lib

-stack 0x00000800
-heap 0x00000800

MEMORY
{
dsp_l2_ram: ORIGIN = 0x11800000 LENGTH = 0x00040000
dsp_l1_pram: ORIGIN = 0x11e00000 LENGTH = 0x00008000
dsp_l1_dram: ORIGIN = 0x11f00000 LENGTH = 0x00008000
entry_point: ORIGIN = 0x80010000 LENGTH = 0x00000080
shared_ram: ORIGIN = 0x80010080 LENGTH = 0x00007F80
external_ram: ORIGIN = 0xC3000000 LENGTH = 0x01000000
}

SECTIONS
{
.text:_c_int00 > entry_point
.cinit > dsp_l2_ram
.text > dsp_l2_ram
.const > dsp_l2_ram
.bss > dsp_l2_ram
.far > dsp_l2_ram
.switch > dsp_l2_ram
.stack > dsp_l2_ram
.data > dsp_l2_ram
.sysmem > dsp_l2_ram
.cio > dsp_l2_ram
}

when I change it as follow:

-l rts67plus.lib

-stack 0x00000800
-heap 0x00000800

SECTIONS
{
.text:_c_int00 > entry_point
.cinit > external_ram
.text > external_ram
.const > external_ram
.bss > external_ram
.far > external_ram
.switch > external_ram
.stack > external_ram
.data > external_ram
.sysmem > external_ram
.cio > external_ram
}

How can I use the L1 and L2 RAM?

How can I make all the section in the internal RAM?

what is the meaning of every section such as cinit?

over 10 years ago

0 Titusrathinaraj Stalin over 10 years ago

TI__Guru** 116100 points

Hi Lisong,

".cinit" section is used for initialization the tables.

http://processors.wiki.ti.com/index.php/Linker_Special_Section_Types

when I make the project start from flash, it does not work.

If you have used "Internal RAM (L1, L2,L3(shared RAM)) then surely you can run the code from flash.

If you have used "external RAM" called "DRAM/DDR2/mDDR" then you have to enable the DRAM support with timing parameters while AIS convertion.

The following .cmd file is used to enable the support for all memories but you have to mention which memory you are going to execute.

/****************************************************************************/
/*  C6748.cmd                                                               */
/*  Copyright (c) 2010 Texas Instruments Incorporated                       */
/*                                                                          */
/*    Description: This file is a sample linker command file that can be    */
/*                 used for linking programs built with the C compiler and  */
/*                 running the resulting .out file on a C6748               */
/*                 device.  Use it as a guideline.  You will want to        */
/*                 change the memory layout to match your specific C6xxx    */
/*                 target system.  You may want to change the allocation    */
/*                 scheme according to the size of your program.            */
/*                                                                          */
/****************************************************************************/

-stack 0x2000
-heap 0x1000

MEMORY
{
    DSPL2ROM    o = 0x00700000  l = 0x00010000 /* 1MB L2 Internal ROM */
    DSPL2RAM    o = 0x00800000  l = 0x00040000 /* 256kB L2 Internal RAM */
    DSPL1PRAM   o = 0x00E00000  l = 0x00008000 /* 32kB L1 Internal Program RAM */
    DSPL1DRAM   o = 0x00F00000  l = 0x00008000 /* 32kB L1 Internal Data RAM */
    SHDSPL2ROM  o = 0x11700000  l = 0x00010000 /* 1MB L2 Shared Internal ROM */
    SHDSPL2RAM  o = 0x11800000  l = 0x00040000 /* 256kB L2 Shared Internal RAM */
    SHDSPL1PRAM o = 0x11E00000  l = 0x00008000 /* 32kB L1 Shared Internal Program RAM */
    SHDSPL1DRAM o = 0x11F00000  l = 0x00008000 /* 32kB L1 Shared Internal Data RAM */
    EMIFACS0    o = 0x40000000  l = 0x20000000 /* 512MB SDRAM Data (CS0) */
    EMIFACS2    o = 0x60000000  l = 0x02000000 /* 32MB Async Data (CS2) */
    EMIFACS3    o = 0x62000000  l = 0x02000000 /* 32MB Async Data (CS3) */
    EMIFACS4    o = 0x64000000  l = 0x02000000 /* 32MB Async Data (CS4) */
    EMIFACS5    o = 0x66000000  l = 0x02000000 /* 32MB Async Data (CS5) */
    SHRAM       o = 0x80000000  l = 0x00020000 /* 128kB Shared RAM */
    DDR2        o = 0xC0000000  l = 0x20000000 /* 512MB DDR2 Data */
}

SECTIONS
{
	.text          >  SHRAM
	.stack         >  SHRAM
	.bss           >  SHRAM
	.cio           >  SHRAM
	.const         >  SHRAM
	.data          >  SHRAM
	.switch        >  SHRAM
	.sysmem        >  SHRAM
	.far           >  SHRAM
  .args          >  SHRAM
	.ppinfo        >  SHRAM
	.ppdata        >  SHRAM

  /* COFF sections */
	.pinit         >  SHRAM
	.cinit         >  SHRAM

  /* EABI sections */
  .binit         >  SHRAM
	.init_array    >  SHRAM
  .neardata      >  SHRAM
	.fardata       >  SHRAM
	.rodata        >  SHRAM
	.c6xabi.exidx  >  SHRAM
	.c6xabi.extab  >  SHRAM
}

0 Lisong Xu1 over 10 years ago in reply to Titusrathinaraj Stalin

Prodigy 160 points

The question is that:

The SHRAM is not big enough to keep all the section in and my design does not have DDR for keeping price low.

So that I want to make all section in L2RAM or L1RAM or L3RAM.

How can I do that?

0 Titusrathinaraj Stalin over 10 years ago in reply to Lisong Xu1

TI__Guru** 116100 points

Hi Lisong,

Understood.

The SHRAM is not big enough to keep all the section in and my design does not have DDR for keeping price low.

What is the total size of .out ?

I'm able to run DSP LED program on C6748 LCDK board through L2 RAM.

Please refer to the following linker cmd file.

// ============================================================================
// Linker Command File for Linking c674 DSP Programs
//
// These linker options are for command line linking only. For IDE linking,
// you should set your linker options in Project Properties.
//         -c                    Link Using C Conventions
//        -stack     0x1000        Software Stack Size
//        -heap    0x1000        Heap Area Size
// ===========================================================================
-stack 0x1000
-heap 0x1000

// ============================================================================
//                         Specify the System Memory Map
// ============================================================================
MEMORY
{
    L1P:    o = 0x11E00000        l = 0x00008000
    L1D:    o = 0x11F00000        l = 0x00008000
    L2:     o = 0x11800000        l = 0x00040000
    DDR:    o = 0xC0000000        l = 0x08000000
    SRAM    o = 0x80000000        l = 0x00020000 /* DDR for program */

}

// ============================================================================
//                 Specify the Sections Allocation into Memory
// ============================================================================
SECTIONS
{
    .cinit        >        L2               // Initialization Tables
    .pinit        >        L2               // Constructor Tables
    .init_array   >        L2               //
    .binit        >        L2               // Boot Tables
    .const        >        L2               // Constant Data
    .switch       >        L2               // Jump Tables
    .text         >        L2               // Executable Code
    .text:_c_int00: align=1024 > L2         // Entrypoint
    
    GROUP (NEARDP_DATA)                       // group near data
    {
       .neardata
       .rodata
       .bss                                   // note: removed fill = 0
    }             >        L2
    .far: fill = 0x0, load > L2             // Far Global & Static Variables
    .fardata      >        L2               // Far RW Data
    .stack        >        L2               // Software System Stack
    .sysmem       >        L2               // Dynamic Memory Allocation Area
    
    .cio          >        L2               // C I/O Buffer
    .vecs         >        L2               // Interrupt Vectors
}

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How to use the L2RAM?