• State Resolved
  • Locked Locked
  • Replies 4 replies
  • Answers 1 answer
  • Subscribers 98 subscribers
  • Views 542 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Timing within IPC example

Viktor Grytsenko
Expert 1225 points

Hello all,

I want to use IPC example from
ipc_1_24_03_32/packages/ti/sdo/ipc/examples/multicore/evm667x/notify_multicore.c
for sending notifications from one core to another with the
purpose to organize parallel multicore processes.
For this I measured the time which takes notification
Core0->Core1->...->Core6->Core7->Core0
I have got unexpected huge time about 37700 [cycles].
Then I have measured time which takes "shortest" notification
Core0->Core1->Core0
I have got again unexpected huge time about 8600 [cycles].

The simple exchange of notifications over shared memory and without using of IPC
(which uses harware resources as I think)
gives the time about tens of cycles and this is acceptable for many cases.

Please suggest me how to use IPC example to get notification time about tens of cycles?

I used:
Code Composer Studio 5.2.1.00018
mcsdk_2_01_02_06
MDSEVM6678L/MDXEVMPCI boards

Source codes of the modified example is in the attachment.

Best regards.

3021.IPC_8cores_Timing_2_1.zip

  • 0
    TI__Mastermind 20790 points

    Hi,

    Find the detailed information for IPC notify module,
    http://processors.wiki.ti.com/index.php/IPC_User%27s_Guide/Notify_Module
    http://processors.wiki.ti.com/index.php/IPC_Users_Guide/Optimizing_IPC_Applications

    See the E2E post, this will be helpful, how to configure and test.
    http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/p/165208/604412.aspx#604412 

    I will check your code and let you know if any modification needs. A timer is a device that can be used to measure the passage of time and notify the CPU or a process when certain time related events occur. Timers exist as either hardware peripherals or as a software construct based upon some globally available timekeeping mechanism.

  • 0 in reply to Pubesh
    Expert 1225 points

    Dear Pubesh,

    I could not answer to your reply in time because I had no an access to the 

    myTI account about three weeks.  Sorry. ASKTEXAS wrote about a bug.

    I read documents you suggested but unfortunately I did not find the answer on my question.

    Thank you for your assistance.

    Best regard.

    Viktor Griysenko.

     

     

  • 0 in reply to Viktor Grytsenko
    TI__Mastermind 20790 points

    Viktor,

    Find the IPC over SHM Benchmark Example at:C:\ti\pdk_C6678_1_1_2_6\packages\ti\transport\ipc\examples\shmIpcBenchmark
    This example demonstrating how to use the IPC over Shared Memory (Circ) transport as well as its performance.

    In addition that, go through this wiki page for benchmarking with IPC_3.x
    http://processors.wiki.ti.com/index.php/IPC_BenchMarking

  • 0 in reply to Pubesh
    Expert 1225 points

    Dear Pubesh,

    I think you give enough documents for the learning of this theme.

    Thank you very much for your assistance.

    Best regard.

    Viktor Griysenko.