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SPI CLK



Hi, 

(1)i am using C6657 multicore DSP and i want to use SPI boot mode. i see in the data sheet that SPI CLK = 3*P2 ; 

where P2 = 1/SYSCLK7.

but some formus say directly SPI CLk = SYSCLK7. Please tell me what is the SPI CLK during booting of my DSP.

(2)how much i have to give chipselect and parameter table index? as i converted my .out file to .bin file using the

 strip6x.exe.

8-7 Chip Select, The chip select field value
6-3 Parameter Table Index,Specifies which parameter table is loaded 

Thanks,

Ram.

  • Hi Ram,

    Ans2: SPI chipselect and parameter table index are not update in data manual. Please refer below thread

    http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/p/283454/1055456.aspx#1055456

    Refer below thread for converting .out file to .bin format

    http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/p/354771/1253899.aspx#1253899

    Thanks,

  • Hello Ram,

    The minimum SPI clock cycle time is specified in the device datasheet as 3*P2 (P2 = 1/SYSCLK7). So the maximum rating of SPI clock is SYSCLK7/3.

    The SPI clock is derived from SYSCLK7 and it is prescaled by the value given in the SPIFMT.PRESCALE register. You cannot get the SYSCLK7 as it is for SPI clock.

    Please refer section 3.13 SPI Data Format Registers (SPIFMTn) in the SPI user guide given below.

    http://www.ti.com/lit/ug/sprugp2a/sprugp2a.pdf

    Regards,

    Senthil

  • Hi Senthil,

    Thanks for the quick response. i formulate like this.

    My RefClk is of 312.5 MHz. and SYSCLk7= RefCLK/6 = 312.5/6 = 52.08 MHz = SPI Module CLk 

    as i understood SYSCLk7 = SPI Module CLK

    Finally SPI CLK =SPI Module CLK/(PRESCALE+1)

    How much PRESCALE value i have to take?you specified that maximum SYSCLK7/3, i.e PRESCALE =2,

    because my RefCLK/6 = 52.08 =SPI Module CLk 

    so SPICLK  = ?

    YOU:The minimum SPI clock cycle time is specified in the device datasheet as 3*P2 (P2 = 1/SYSCLK7). So the maximum rating of SPI clock is SYSCLK7/3.

    SPEC:15-8 PRESCALE SPI prescaler (value = 0-FFh). It determines the bit transfer rate if the SPI is the network master and is directly derived 

    from the SPI module clock. If the SPI is configured as slave, PRESCALE does not need to be configured.
    The clock rate can be calculated as:
    SPI clock frequency = SPI module clock/(PRESCALE + 1)
    Note: When PRESCALEx is cleared to 0, the SPI clock rate defaults to SPI module clock/2.

    Thanks,

    Ram.

  • Hello Ram,

    When your SYSCLK7 is 52.08 MHz, the maximum SPI clock is 17.36 MHz (52.08MHz/3). So you can set the PRESCALE in the range of 2 to FFh. 

    Since the maximum SPI clock frequency is given as SYSCLK7/3 in MHz (3*P2 (P2 = 1/SYSCLK7) in ns), you cannot set the PRESCALE value as 1 and 0. The value must be in the range of 2 to FFh. Please note the PRESCALE register description in user guide is generic for all keystone devices and the value limitation varies from device to device. 

     

    Regards,

    Senthil

  • Hi,

    Thanks for your quick response. chip select is fine i will look into the Hw Manual. 

    i am not clear regarding boot parameter table index,  my setup is like this i have in.out file i already converted to  out.bin file based on strip6x.exe. so i don't understand what is this boot param table or very importantly the parameter table index because i have to give this index in the SPI device configuration bit field. i have only one .bin file with me. what i have to enter now.

    Thanks,

    Ram.

  •  

    Hi Senthil,

    Thanks for your answer. but one more question. how to set this prescale value in SPIFMTn. who has to set this value?

    Please refer section 3.13 SPI Data Format Registers (SPIFMTn) in the SPI user guide given below.

     

    thanks,

    Ram.

  • Hello RAM,

    The PRESCALE value shall be set in the SPI initialization in SPI driver. Please refer section 2.15 Initialization in the SPI user guide.

    Regards,
    Senthil

  • Hi,

    The MCSDK has the tiboot.h under \mcsdk_2_01_02_05\tools\boot_loader\ibl\src\device. This has all the boot parameter table for all the boot modes for different devices.

    Thanks,

  • Hi Ganapathi,

    can you please tell me exactly which file specifies the boo parameter  table. 

    i am explaining again my status: i have one .out file generated with CCSv5.5 which contains all the pll configuration ,PCIe express configuration and DDR3 configuration.i am using JTAG to load this .out file into the DSP and DSP is booted and works fine. i want to send this .out file through the spi boot mode protocol. so first i converted this .out file into .bin file (the methodology given by you) and i want to write this .bin file into the FPGA, from where it goes to DSP by spi link. 

    if  my .bin file is boot parameter table(i am not sure). then what is the parameter table index?

    or if not, do i have to prepare any other boot  parameter table to load to DSP via spi as a primary bootloader.

    and secondary bootloader in this case loads my application .bin, as i don't have any secondary boot loader or any 

    NOR flash, i have only one .bin file and My FPGA from where i can load this .bin file to the DSP.

    Please clarify my questions.

    Thanks,

    Ram.