66ak2e05 cache protection

Rick Nardone

Hi,

Customer would like to know if there are any
unprotected bits (no parity detection) in the ARM L1 program or data cache in
the Keystone II 66AKE05.

Best,

Rick Nardone

over 10 years ago

0 Chad Courtney over 10 years ago

TI__Mastermind 30825 points

Rick,

Short answer is no, but more details can be found on the wiki http://processors.wiki.ti.com/index.php/Keystone_Error_Detection_and_Correction_EDC_ECC#ARM-A15_Error_Detection_and_Correction_.28ECC.29_Keystone_Support

Note that the GHB and Indirect Predictor RAMs for the L1 not being protected would only result as a predictor miss if it were to be corrupted from something like an SER. Where the data is stored is protected.

Best Regards,

Chad

0 Paul LeBlanc over 10 years ago

Prodigy 40 points

If there are any uncovered bits, we would also like to know how many. We factor this information into our SEE analysis.

0 Chad Courtney over 10 years ago in reply to Paul LeBlanc

TI__Mastermind 30825 points

Paul,

As mentioned the only bits in the L1 that are not protected are used for prediction (i.e. predicting what needs to be accessed next so it can grab the data early.) If this 'fails' it does not result in any use/loss/corruption of actual data. It just means that they access may be slow for that one prediction. No worse than the prediction being wrong which is going to happen pretty much every time you access data that goes outside the current access pattern.

This should not be calculated in SEE.

Best Regards,

Chad

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66ak2e05 cache protection