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Configuration GPIO126-129 on OMAP3 AP Module DM3730

Hoang Quoc Viet93
Prodigy 60 points
Other Parts Discussed in Thread: DM3730

I am working on PantherBoard (Omap3 AP module DM3730). I want use GPIO_126 as output. I do follow instruction on: http://processors.wiki.ti.com/index.php?title=Additional_Configuration_for_GPIO120-129_on_OMAP35x and http://processors.wiki.ti.com/index.php/SD-MMC_Usage_Notes_on_OMAP35x_and_AM37x.
Follow the guide, I need do :

PBIASLITEVMODE1 - sets voltage as 1.8V or 3.0V for gpio_126 - gpio_129
PBIASLITEPWRDNZ1 - buffers the I/O cell for gpio_126 - gpio_129 (needs to be set to 1)
and
GPIO_IO_PWRDNZ - enable the gpio_126, gpio_127, and gpio_129 extended-drain I/O cells

I modify bealge.c on <jorjin_bsp>/u-boot/board/ti/beagle/beagle.c:
/* set up dual-voltage GPIOs to 1.8V */
    pbias_lite = readl(&t2_base->pbias_lite);
    pbias_lite &= ~PBIASLITEVMODE1;
    pbias_lite |= PBIASLITEPWRDNZ1;
    writel(pbias_lite, &t2_base->pbias_lite);
    writel(readl(CONTROL_WKUP_CTRL) | GPIO_IO_PWRDNZ,
            CONTROL_WKUP_CTRL);
I add pinmux on beagle.h:

    MUX_VAL(CP(MMC1_DAT4),        (IEN  | PTU | EN | M4)) /*GPIO_126*/\
    MUX_VAL(CP(MMC1_DAT5),        (IEN  | PTU | EN | M4)) /*GPIO_127*/\
    MUX_VAL(CP(MMC1_DAT6),        (IEN  | PTU | EN | M4)) /*GPIO_128*/\
    MUX_VAL(CP(MMC1_DAT7),        (IEN  | PTU | EN | M4)) /*GPIO_129*/

But when i check pinmux on board by command: cat /sys/kernel/debug/omap_mux/board/core, i get:

OMAP3_MUX(SDMMC1_CLK, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),                  
OMAP3_MUX(SDMMC1_CMD, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),                  
OMAP3_MUX(SDMMC1_DAT0, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),                 
OMAP3_MUX(SDMMC1_DAT1, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),                 
OMAP3_MUX(SDMMC1_DAT2, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),                 
OMAP3_MUX(SDMMC1_DAT3, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),                 
OMAP3_MUX(SDMMC1_DAT4, OMAP_PIN_INPUT | OMAP_MUX_MODE0),                        
OMAP3_MUX(SDMMC1_DAT5, OMAP_PIN_INPUT | OMAP_MUX_MODE0),                        
OMAP3_MUX(SDMMC1_DAT6, OMAP_PIN_INPUT | OMAP_MUX_MODE0),                        
OMAP3_MUX(SDMMC1_DAT7, OMAP_PIN_INPUT | OMAP_MUX_MODE0), 

I don't know who pinmux for SDMMC1_DAT4:7 ? And Where are pinmux for it?
I try pinmux on file board kernel at board_omap3_beagle.c but nothing to change. Do everyone know how to fix this issue? Please help me!

Thanks,

HoangViet.

  • 0
    TI__Guru 65405 points

    Hi HoangViet,

    Could you check and confirm that your board file is beagle.c because you are using a PantherBoard to prevent confusion. Also it is possible the kernel to change the pinmux configuration. This should be checked too.

    Could you share which SW release you are using?

    BR

    Tsvetolin Shulev

  • 0 in reply to Cvetolin Shulev-XID
    Prodigy 60 points

    Thanks for your reply.

    I use BSP supported by JorJin: http://59.124.231.13/index.php/JAJ_1.0.DEV04_AP_Module_AM37_Jelly_Bean_Release_Notes

    I check on board-omap3beagle.c: NO pinmux for SDMMC1_DAT4 (GPIO_126), SDMMC1_DAT5 (GPIO_127),..
    static struct omap_board_mux board_mux[] __initdata = {
        OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP |
                    OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
                    OMAP_PIN_OFF_WAKEUPENABLE),
    #ifdef CONFIG_MACH_OMAP3_PANTHER
        OMAP3_MUX(CAM_D0,OMAP_MUX_MODE0|OMAP_PIN_OFF_INPUT_PULLDOWN),
        OMAP3_MUX(CAM_D1,OMAP_MUX_MODE0|OMAP_PIN_OFF_INPUT_PULLDOWN),
        OMAP3_MUX(CAM_D2,OMAP_MUX_MODE0|OMAP_PIN_OFF_INPUT_PULLDOWN),
        OMAP3_MUX(CAM_D3,OMAP_MUX_MODE0|OMAP_PIN_OFF_INPUT_PULLDOWN),
        OMAP3_MUX(CAM_D4,OMAP_MUX_MODE0|OMAP_PIN_OFF_INPUT_PULLDOWN),
        OMAP3_MUX(CAM_D5,OMAP_MUX_MODE0|OMAP_PIN_OFF_INPUT_PULLDOWN),
        OMAP3_MUX(CAM_D6,OMAP_MUX_MODE0|OMAP_PIN_OFF_INPUT_PULLDOWN),
        OMAP3_MUX(CAM_D7,OMAP_MUX_MODE0|OMAP_PIN_OFF_INPUT_PULLDOWN),

        OMAP3_MUX(CAM_D8,OMAP_MUX_MODE0|OMAP_PIN_OFF_INPUT_PULLDOWN),
        OMAP3_MUX(CAM_D9,OMAP_MUX_MODE0|OMAP_PIN_OFF_INPUT_PULLDOWN),
        OMAP3_MUX(CAM_D10,OMAP_MUX_MODE0|OMAP_PIN_OFF_INPUT_PULLDOWN),
        OMAP3_MUX(CAM_D11,OMAP_MUX_MODE0|OMAP_PIN_OFF_INPUT_PULLDOWN),


        OMAP3_MUX(DSS_DATA0,OMAP_MUX_MODE0|OMAP_PIN_OFF_INPUT_PULLDOWN),
        OMAP3_MUX(DSS_DATA1,OMAP_MUX_MODE0|OMAP_PIN_OFF_INPUT_PULLDOWN),
        OMAP3_MUX(DSS_DATA2,OMAP_MUX_MODE0|OMAP_PIN_OFF_INPUT_PULLDOWN),
        OMAP3_MUX(DSS_DATA3,OMAP_MUX_MODE0|OMAP_PIN_OFF_INPUT_PULLDOWN),
        OMAP3_MUX(DSS_DATA4,OMAP_MUX_MODE0|OMAP_PIN_OFF_INPUT_PULLDOWN),
        OMAP3_MUX(DSS_DATA5,OMAP_MUX_MODE0|OMAP_PIN_OFF_INPUT_PULLDOWN),

        //  OMAP3_MUX(UART2_RX,OMAP_MUX_MODE1|OMAP_PIN_OFF_INPUT_PULLDOWN),
        OMAP3_MUX(CAM_XCLKB,OMAP_MUX_MODE0|OMAP_PIN_OFF_INPUT_PULLDOWN),
    //viethq add
        /*gpio_113*/
        OMAP3_MUX(CSI2_DY0,OMAP_MUX_MODE4|OMAP_PIN_OUTPUT),
        /*gpio_114*/
        OMAP3_MUX(CSI2_DX1,OMAP_MUX_MODE4|OMAP_PIN_OUTPUT),
        /*gpio_115*/
        OMAP3_MUX(CSI2_DY1,OMAP_MUX_MODE4|OMAP_PIN_INPUT),
    //End.
        OMAP3_MUX(MCBSP1_CLKX,OMAP_MUX_MODE0|OMAP_PIN_OFF_INPUT_PULLDOWN),
        OMAP3_MUX(MCBSP1_DX,OMAP_MUX_MODE0|OMAP_PIN_OFF_INPUT_PULLDOWN),
        OMAP3_MUX(MCBSP4_CLKX,OMAP_MUX_MODE0|OMAP_PIN_OFF_INPUT_PULLDOWN),
        OMAP3_MUX(MCBSP4_DR,OMAP_MUX_MODE0|OMAP_PIN_OFF_INPUT_PULLDOWN),

        OMAP3_MUX(MCBSP4_DX,OMAP_MUX_MODE0|OMAP_PIN_OFF_INPUT_PULLDOWN),
        OMAP3_MUX(MCBSP4_FSX,OMAP_MUX_MODE0|OMAP_PIN_OFF_INPUT_PULLDOWN),
        OMAP3_MUX(MCBSP_CLKS,OMAP_MUX_MODE0|OMAP_PIN_OFF_INPUT_PULLDOWN),
        OMAP3_MUX(ETK_D9,OMAP_MUX_MODE2|OMAP_PIN_OFF_INPUT_PULLDOWN),
        OMAP3_MUX(MCBSP3_DX,OMAP_MUX_MODE0|OMAP_PIN_OFF_INPUT_PULLDOWN),
        OMAP3_MUX(MCBSP3_DR,OMAP_MUX_MODE0|OMAP_PIN_OFF_INPUT_PULLDOWN),
        OMAP3_MUX(MCBSP3_CLKX,OMAP_MUX_MODE0|OMAP_PIN_OFF_INPUT_PULLDOWN),
        OMAP3_MUX(MCSPI1_SIMO,OMAP_MUX_MODE0|OMAP_PIN_OFF_INPUT_PULLDOWN),

        OMAP3_MUX(MCSPI1_SOMI,OMAP_MUX_MODE0|OMAP_PIN_OFF_INPUT_PULLDOWN),
        OMAP3_MUX(ETK_D4,OMAP_MUX_MODE2|OMAP_PIN_OFF_INPUT_PULLDOWN),
        OMAP3_MUX(ETK_D5,OMAP_MUX_MODE2|OMAP_PIN_OFF_INPUT_PULLDOWN),
        OMAP3_MUX(ETK_D6,OMAP_MUX_MODE2|OMAP_PIN_OFF_INPUT_PULLDOWN),
        OMAP3_MUX(ETK_D7,OMAP_MUX_MODE2|OMAP_PIN_OFF_INPUT_PULLDOWN),

        /* RFID_IRQ - GPIO 127 *///sim_clk, sdmmc1_dat4, csi2_dy0, gpmc_nbe1
        OMAP3_MUX(SDMMC1_DAT4, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
        OMAP3_MUX(SDMMC1_DAT7, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
        // OMAP3_MUX(SIM_CLK, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
        //OMAP3_MUX(CSI2_DY1, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
        // OMAP3_MUX(SDMMC1_DAT5, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
        // OMAP3_MUX(SDMMC1_DAT4, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
        //OMAP3_MUX(CSI2_DY0, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
    //Viethq add
        // TruongNvb
        /* Pinmux for GPIO app: Relay, Led, Lock status, RFID */
        /* RELAY control - GPIO_157*/
        OMAP3_MUX(MCBSP1_FSR, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
        /* Touch - GPIO_115 */
        OMAP3_MUX(CSI2_DY1, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
        /* Backlight GPIO_14 or GPIO_113 or GPIO_23*/
        OMAP3_MUX(ETK_D0, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
        /* HUB reset - GPIO_40 */
        OMAP3_MUX(GPMC_A7, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
        /* WLAN enable - GPIO_16 */ //OK
        /* ZWave IRQ - GPIO_41*/
        OMAP3_MUX(GPMC_A8, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),

        //ChienNQ
        /* LED FLASH control - GPIO_83 */
        OMAP3_MUX(DSS_DATA13, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
        /* LOCK status - GPIO_85 */
        OMAP3_MUX(DSS_DATA15, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
        /* RELAY control - GPIO_157 */
        OMAP3_MUX(MCBSP1_FSR, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
        /* Zwave IRQ - GPIO_17 */
        OMAP3_MUX(ETK_D3, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
        /* Accerlerometter IRQ - GPIO_43 */
        OMAP3_MUX(GPMC_A10, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
        /* RFID interrupt - GPIO_170 */
        OMAP3_MUX(HDQ_SIO, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
        /* Camera*///OK
        /* Hub *///OK
        /* Wifi *///OK
    //End.
    #endif
    #if defined(CONFIG_MACH_OMAP3_PANTHER) && defined(CONFIG_WL12XX_PLATFORM_DATA)
        /* WLAN IRQ - GPIO 112 */
        OMAP3_MUX(CSI2_DX0, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
        /* WLAN POWER ENABLE - GPIO 16 */
        OMAP3_MUX(ETK_D2, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
        /* MMC2 SDIO pin muxes for WL12xx */
        OMAP3_MUX(SDMMC2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
        OMAP3_MUX(SDMMC2_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
        OMAP3_MUX(SDMMC2_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
        OMAP3_MUX(SDMMC2_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
        OMAP3_MUX(SDMMC2_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
        OMAP3_MUX(SDMMC2_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
    #endif
        { .reg_offset = OMAP_MUX_TERMINATOR },
    };
    #endif
    I am stucking in here. Please help me.

    Regards,

    HoangViet.

  • 0 in reply to Hoang Quoc Viet93
    TI__Guru 65405 points

    Hi HoangViet,

    Could you try to set the same pinmux configuration for gpios 126-129 via the kernel and then check again configuration.

    Also I suggest you to try the pinmuxtool-v2 from the link below for advanced debugging:

    http://www.ti.com/tool/pinmuxtool

    BR

    Tsvetolin Shulev

  • 0 in reply to Cvetolin Shulev-XID
    TI__Guru 65405 points

    Hi HoangViet,

    I would like to give some additional particularity about using the gpio_120 - gpio_129 which is needed regardless of the processor package type (CBB, CBC, CUS). These pins are unique because they are configurable as 1.8V or 3.0V I/O. Additionally, they include a protection mechanism to isolate the cell as the voltage is ramping. The necessary configuration steps are described in the linked article:

    http://processors.wiki.ti.com/index.php/Additional_Configuration_for_GPIO120-129_on_OMAP35x

    BR

    Tsvetolin Shulev

  • 0 in reply to Cvetolin Shulev-XID
    Prodigy 60 points

    I have configured step as that link. Over head i post:
    Follow the that guide, I need do :

    PBIASLITEVMODE1 - sets voltage as 1.8V or 3.0V for gpio_126 - gpio_129
    PBIASLITEPWRDNZ1 - buffers the I/O cell for gpio_126 - gpio_129 (needs to be set to 1)
    and
    GPIO_IO_PWRDNZ - enable the gpio_126, gpio_127, and gpio_129 extended-drain I/O cells

    I modify bealge.c on <jorjin_bsp>/u-boot/board/ti/beagle/beagle.c:
    /* set up dual-voltage GPIOs to 1.8V */
        pbias_lite = readl(&t2_base->pbias_lite);
        pbias_lite &= ~PBIASLITEVMODE1;
        pbias_lite |= PBIASLITEPWRDNZ1;
        writel(pbias_lite, &t2_base->pbias_lite);
        writel(readl(CONTROL_WKUP_CTRL) | GPIO_IO_PWRDNZ,
                CONTROL_WKUP_CTRL);
    I add pinmux on beagle.h:

        MUX_VAL(CP(MMC1_DAT4),        (IEN  | PTU | EN | M4)) /*GPIO_126*/\
        MUX_VAL(CP(MMC1_DAT5),        (IEN  | PTU | EN | M4)) /*GPIO_127*/\
        MUX_VAL(CP(MMC1_DAT6),        (IEN  | PTU | EN | M4)) /*GPIO_128*/\
        MUX_VAL(CP(MMC1_DAT7),        (IEN  | PTU | EN | M4)) /*GPIO_129*/

    Thanks for your share. Please check for me, I really have configuration that exactly?

  • 0 in reply to Hoang Quoc Viet93
    TI__Guru 65405 points

    Hi Hoang,

    Could you print the value of the CONTROL_WKUP_CTRL and CONTROL_PBIAS_LITE registers to check the whether the GPIO_IO_PWRDNZ, PBIASLITEPWRDNZ1 and PBIASLITEVMODE1 fields are set properly?

    BR

    Tsvetolin Shulev