Hi,
We have a custom board based on K2HK and PCIE devices connected over PCIE interface. We use kernel driver from the device vendor for accessing and configuring the device over PCIE interface.
We are facing issues while using PCI DMA transfers and see that there might be cache coherency issue and needs to be flushed. We make use of pci_dma_sync_single_for_device and pci_dma_sync_single_for_cpu to ensure that cache is cleared. But this does not help to solve the issue. The vendor driver can handle only 32 bit DMA address.
We tried to clear the mem_lpae u-boot environment variable just to check the behaviour and ran our tests. We did not see issues with DMA transfers. If our understanding is right, with mem_lpae variable set , the kernel DDR load addresses are in 36 bit limits and if mem_lpae is cleared, then u-boot uses 32 bit load addresses for the kernel. But in the linux kernel configuration, CONFIG_ARM_LPAE is always enabled for keystone 2 system and cannot be disabled.
Our DDR3A and DDR3B sizes are below 2GB ranges. Is there any real use of having mem_lpae env variable? What potential issues can arise if mem_lpae is disabled?
Regards
Rams