GPIO protection of TMS320C674x

Hello Vitalii,

Could you please elaborate your requirement ?

Are you going to connect high current input to GPIO ?

Regards,

Senthil

Hello Senthil!

Thank You very much for the answer!

I see that maximum output current of DSP outputs is 4mA(subsection 4.4 of C6747(45) datasheet SPRS377E). How should I protect GPIO from overcurrent. I don`t know the output resistance of GPIO, so I cannot calculate the value of a current-limiting resistor.

For example in our customer-board the TMS320C6745 DSP interfaces with another uCPU. And during a debugging there is risk that output of DSP will shorted to the output of another uCPU. (the spi sck outp of DSP will be shorted to the spi sck outp of uCPU due to a possible error of the SPI tuning ). 

There is also a question, why in the subsection 4.4 of C6747(45) datasheet (SPRS377E) the boundary value of the high-level output current is negative (-4mA). And low-level value is positive. I have thought that first one should be positive and the second - negative.

Thank you very much!

Vitalii

Hello Vitalii,

I see that maximum output current of DSP outputs is 4mA(subsection 4.4 of C6747(45) datasheet SPRS377E). How should I protect GPIO from overcurrent. I don`t know the output resistance of GPIO, so I cannot calculate the value of a current-limiting resistor.

The GPIO output can source or sink up to maximum of 4mA. So you need not to be worry about the overcurrent when it is configured as output. The current limiting resistor will be calculated based on this maximum current of 4mA.

 

For example in our customer-board the TMS320C6745 DSP interfaces with another uCPU. And during a debugging there is risk that output of DSP will shorted to the output of another uCPU. (the spi sck outp of DSP will be shorted to the spi sck outp of uCPU due to a possible error of the SPI tuning ). 

I don't think the SPI CLK to SPI CLK connection creates problem for you. It is supposed to be connected like this. The software will take of the master slave configuration and set one as output and another as input.

There is also a question, why in the subsection 4.4 of C6747(45) datasheet (SPRS377E) the boundary value of the high-level output current is negative (-4mA). And low-level value is positive. I have thought that first one should be positive and the second - negative.

The high level output current is source current and low level output current is sink current. The sign convention is based on the electron flow direction from one point to another. Please refer the below link for better understanding.

http://en.wikipedia.org/wiki/Current_sources_and_sinks

Regards,

Senthil

Dear Senthil!

Thank You very much for the answer and gived information!

When I speak about SPI, I suggest the case of error: both DSP and uCPU are configured as masters. In this case output will be shorted to output. ... Such errors sometimes appear during software developing or debugging. Hardware environment of DSP must protect it from such errors...

As I understand, The value of current limiting resistor is (both CPUs are 3.3V):

R = 3.3V / 4 mA = 825 Ohm. 

Very big value comparatively with a similar one (22 Ohm) from the Spectrum digital OMAP L137 EVM schematics rev "G" (sheet 4 "Serial I/O").

And another problem connected with such protection. We plan to boot DSP from uCPU in the SPI0 slave mode. To do this:

1. Host uCPU sends reset to DSP (Reset to low);

2. Host uCPU set proper values at the DSP BOOT pins. Note please, that at this stage the used pins of the host uCPU are configured as output;

3. Host uCPU releases the Reset pin of the DSP. After this DSP configure its units for booting, e.g. SPI0. Begins the booting of the DSP as it is described in the http://processors.wiki.ti.com/index.php?oldid=57073. But note please, that DSP BOOT pins are multiplexed with SPI0 pins. SPI0_SOMI is multiplexed with BOOT[0]. So after the releasing of reset this pin will be reconfigured as OUTPUT. Host uCPU must simultaneously reconfigure its corresponding pin from OUTPUT to INPUT. Otherwise output of the host uCPU will be shorted to the output of the DSP. I think such simultaneous change of a pin state is impossible. It will be always a some delay between the state changing of pins (outp or inp) of host uCPU and slave DSP. So we must protect our DSP GPIOs from overcurrent...

Dear Senthil, could You please comment my "fears"

Thank you very much!

Vitalii

Dear Senthil, could You please comment my "fears"

Thank you very much!

Vitalii

Dear Denis!

Thank You very much for answer and simulation with IBIS models!!!
So, probably, 22 ... 100 Ohms would protect DSP outputs from overcurrent during DSP software debugging.

Thank You very much!
Best Regards
Vitalii