Have I read the errata correctly, where it implies that silicon revisions 3.1 and later can now have the USB EHCI block connected to one port whilst having the OHCI block connected to another simultaneously? We've designed with an external HS phy on host port 1 plus a hub to get a couple of HS/FS/LS ports, but it would be nice to interface to the wireless module using host port 2 in tll mode using the OHCI block. Simply using another port off the hub for this doesn't make sense due to the power consumption.
Regards,
-Jeff