Keystone package pin delay

Moshe Lerner

Hello

We are developing a board based on Keystone1 and Keystone2 devices.

Some manufactureres of components provide information of pin delay (time the signal reach the silicon from package pin).

Does TI provides such information? Is there any difference in internal delay from package pins to the silicon for Keystone devices? If yes, where I can find the information?

Thanks

Moshe Lerner

over 10 years ago

0 Senthilkumar Srinivasan over 10 years ago

TI__Mastermind 43660 points

Hello Moshe,

I will check on this information and update you soon.

Thanks for your patience.

Regards,

Senthil

0 Bill Taboada over 10 years ago

TI__Mastermind 42545 points

Hi Moshe,

TI does not provide that information for the KeyStone components. That variation due to the delays inside the package are recognized in the routing requirements for the board. If you are meeting the routing requirements, the internal differences will non effect the operation of the interface.

Regards, Bill

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Keystone package pin delay