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about the am335x cache

yihao wang
Intellectual 680 points

hi TIer

    when the am335x power up, the cache is enabled defaultly?

when I wanna uncached some address space,e.g some peripheral configure address,what should I do? 

thanks

  • 0
    TI__Guru**** 393215 points

    Hi,

    No the caches are not enabled by default.

  • 0 in reply to Biser Gatchev-XID
    Intellectual 680 points

    hi biser

        About am335x processor, are there any documents detailed the cache operation like c64x?

  • 0 in reply to yihao wang
    TI__Guru**** 393215 points

    All the MPU related documentation can be found in the Cortex-A8 section on http://infocenter.arm.com/help/index.jsp

  • 0
    Mastermind 8040 points

    For the Cortex-A8 and similar ARM processors, the most important step is configuring and enabling the MMU, since the MMU determines attributes such as cacheability for memory regions.  Once the MMU is enabled, you only need to set a few control register bits and you're done.

    The details are in the ARM v7-A/R architecture reference manual (I personally prefer the older revision B over the latest version, since the new one is cluttered with new features that don't apply to the cortex-A8), specifically the "Virtual Memory System" chapter, but since it gives the full details of all features it can make it seem a lot harder than it really is.

    A minimal setup would be to create a "translation table" of 4096 entries: each is a 32-bit field that describes 1 MB of address space.  You write the pointer to this table (and its own cache-policy) to "Translation Table Base Register 0", then set the MMU-enabled and cache-enabled bits in the "System Control Register" and that should be it.

    I've been working on init code lately myself, I'll see if I have time later to make a simple example of these steps.

  • 0 in reply to Matthijs van Duin
    Mastermind 8040 points

    Matthijs van Duin said:
    I've been working on init code lately myself, I'll see if I have time later to make a simple example of these steps.

    See attachment for a rather minimalistic example of setting up the MMU and enabling caches on a Cortex-A8, including a basic section table suitable for the am335x.  You may still want to tweak it to personal needs/preferences.  It's C++, although it's close enough to plain C that it shouldn't be hard to convert it if you dislike C++.  I haven't included the header file since it's specific to my project, but the only definitions relevant here are the declaration void init_mmu(); and the abbreviation u32 for uint32_t

    http://e2e.ti.com/cfs-file.ashx/__key/communityserver-discussions-components-files/791/6644.mmu.cc