EDMA transmits just half of the values

Hi Christoph,

Are you trying the starterware ( non -OS based ) examples or the linux based code? on EDMA?

Would you please mention the name of the TI package you are using for this experiment?

Regards,

Shankari

Hi Shankari,

I´m using TI-RTOS (c6000 2.00.01.23) with SYSBIOS (6.40.1.15 (part of TI-RTOS)) and the EDMA Low Level Drivers (2.11.14.19). The example is based on the EDMA LLD example in the mentioned folder. I adjusted it because of some errors beforehand. Now it is free of errors, but not working properly. I´m just working / programming on the DSP part, not on the ARM now, so it is not linux based.

Regards,

Christoph

Hi,

Thanks for your update.

I think, you are using the latest TI-RTOS SYSBIOS kernel (2.00.01.23) and if you plan to use the latest, it is recommedned to use CCSv6 or higher and specific compiler versions mentioned in the release notes which are the dependancies.

Unfortunately, there are no examples available for EDMA usage with the newest TI-RTOS & CCSv6 for OMAPL138 boards but available older version EDMA examples can be ported to other boards and devices. Please check the TI-RTOS porting guide as below:

http://processors.wiki.ti.com/index.php/TI-RTOS_Porting_Guide

Also, please check for the known issues too from the newest TI-RTOS kernel (2.00.01.23) release notes as below:

http://software-dl.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/mcusdk/2_00_01_23/exports/tirtos_2_00_01_23_release_notes.html#Known_Issues

If you plan to use TI-RTOS within Code Composer Studio v6.0 or higher, is it recommended that you use the CCS App Center to install TI-RTOS. Please download the latest version of TI-RTOS as below:

http://software-dl.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/mcusdk/index.html

http://processors.wiki.ti.com/index.php/TI-RTOS#Examples

Thanks & regards,

Sivaraj K

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Hi,

can you suggest an example for the OMAPL138LCDK which I can port from SYS-BIOS to TI-RTOS, please?
 Like you suggested I´m using cssv6 and installed TI-RTOS with the app center.

Best regards

Christoph

Hi,

I tried to double my buffersize of my destination buffer and now it transmits the whole sourcebuffer and the other half of the destinationbuffer is empty. Why does it work now? Does somebody have a clue? Also the callback function with the parameters:

/* Callback function 1 */
void callback1 (uint32_t tcc, EDMA3_RM_TccStatus status,
                void *appData)
{
    (void)tcc;
    (void)appData;
    switch (status)
    {
    case EDMA3_RM_XFER_COMPLETE:
        /* Transfer completed successfully */
        irqRaised1 = 1;
        break;
    case EDMA3_RM_E_CC_DMA_EVT_MISS:
        /* Transfer resulted in DMA event miss error. */
        irqRaised1 = -1;
        break;
    case EDMA3_RM_E_CC_QDMA_EVT_MISS:
        /* Transfer resulted in QDMA event miss error. */
        irqRaised1 = -2;
        break;
    default:
        break;
    }
    Semaphore_post(AppSemHandle1);//edma3OsSemGive(AppSemHandle1);
}

is called but status looks like an address not an EDMA3_RM_TccStatus parameter. How do I get the status right? Do I have to give some parameters to edma...requestchannel??

Best Regards

Christoph

Hi Christoph,

Thanks for your update.

In normal case, if DMA transfer completed succesfully or submitted to the TC, then it should hold the value of  EDMA3_RM_XFER_COMPLETE = 1 which is of enum typedef  EDMA3_RM_TccStatus. May be you could check the declaration of EDMA3_RM_TccStatus enum variable from the below location:

~\ti\edma3_lld_02_11_xx_xx\packages\ti\sdo\edma3\rm\edma3_rm.h

Thanks & regards,

Sivaraj K

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Hi,

The value of status cannot be 0xC3025734 and i think, there is something messed up. May be, you could check the argument values of callback1 function when it tries to request  any DMA channel and any TCC through edma driver API call like below:

EDMA3_DRV_requestChannel (hEdma, &ch1Id, &tcc1,

                                           (EDMA3_RM_EventQueue)0,

                                           &callback1, NULL);

I think, you should debug the code through keeping break points at appropriate place and track the values end to end, so that, you could figure out where it messes up.

Thanks & regards,

Sivaraj K

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Hi Christoph,

We have few basic clarifications from you to address as below:
 
How did you program the EDMA PaRAM Sets?
Which type of transfer mode are you using in EDMA? etc.

For EDMA transfer operations and PaRAM sets, please refer omapl138 TRM chapter 18, see sections 18.2.3 & 18.2.4.

Thanks & regards,
Sivaraj K

Hi Sivaraj K.

here is my testcode I´m using the manual mode to just test it.
And the paramset are set with the EDMA3_DRV_setPaRAM from the EDMA folder. I read the the chapters and
found nothing wrong. The strang thing if I double the space for my destination variable, then all values are transmitted,
and so half of now doubled variable is empty.

Thanks & regards,
Christoph S

/*
 * test.c
 *
 *  Created on: 19.11.2014
 *      Author: cstaat
 */
#include <test.h>
#include <edma.h>
/*
 *  ======== Global Variables ========
 */
extern short gBuf0[BUFFSIZE];
extern short gBuf1[BUFFSIZE];

void callback1 (uint32_t tcc, EDMA3_RM_TccStatus status, void *appData);
//extern void *AppSemHandle1;
volatile short irqRaised1 = 0;

EDMA3_DRV_Result test (EDMA3_DRV_Handle hEdma,uint32_t acnt,uint32_t bcnt,uint32_t ccnt,EDMA3_DRV_SyncType syncType)
{
	EDMA3_DRV_Result result = EDMA3_DRV_SOK;
	EDMA3_DRV_PaRAMRegs paramSet = {0,0,0,0,0,0,0,0,0,0,0,0};
    uint32_t Istestpassed = 0u;
    uint32_t numenabled = 0;
    uint32_t BRCnt = 0;
    uint32_t chId = 0;
    uint32_t tcc = 0;
    void *cbData=NULL;
    int i;
    int srcbidx = 0, desbidx = 0;
    int srccidx = 0, descidx = 0;

    /* Set B count reload as B count. */
    BRCnt = bcnt;

    /* Setting up the SRC/DES Index */
    srcbidx = (int)acnt;
    desbidx = (int)acnt;
    if (syncType == EDMA3_DRV_SYNC_A)
    {
        /* A Sync Transfer Mode */
        srccidx = (int)acnt;
        descidx = (int)acnt;
    }
    else
    {
        /* AB Sync Transfer Mode */
        srccidx = ((int)acnt * (int)bcnt);
        descidx = ((int)acnt * (int)bcnt);
    }


    /* Setup for Channel 1*/
    tcc = EDMA3_DRV_TCC_ANY;
    chId = EDMA3_DRV_DMA_CHANNEL_ANY;

    result=EDMA3_DRV_requestChannel(hEdma,&chId,&tcc,(EDMA3_RM_EventQueue) 0,// EventQueue 0 (1 out of 8)
                (EDMA3_RM_TccCallback)&callback1,cbData);//(EDMA3_RM_TccCallback)//& at callback1
    if (result == EDMA3_DRV_SOK)
    {
		/* Src & Dest are in INCR modes */
		//paramSet.opt &= 0xFFFFFFFCu;
		paramSet.opt =EDMA3_DRV_OPT_SAM_SET_MASK(INCR);
		paramSet.opt =EDMA3_DRV_OPT_DAM_SET_MASK(INCR);
		/* Program the TCC */
		paramSet.opt |= EDMA3_DRV_OPT_TCC_SET_MASK(tcc);

		/* Enable Intermediate & Final transfer completion interrupt */
		paramSet.opt |= EDMA3_DRV_OPT_ITCINTEN_SET_MASK(0);//just final
		paramSet.opt |= EDMA3_DRV_OPT_TCINTEN_SET_MASK(1);// just trying 0

		paramSet.opt |= EDMA3_DRV_OPT_SYNCDIM_SET_MASK(syncType);//SYNCDIM 1

		paramSet.opt |=EDMA3_DRV_OPT_FWID_SET_MASK(WIDTH);
		//paramSet.srcAddr    = (uint32_t)(srcBuff1);
		paramSet.srcAddr    = (uint32_t)gBuf0;
		//paramSet.destAddr   = (uint32_t)(dstBuff1);
		paramSet.destAddr   = (uint32_t)(gBuf1);
        /*
		* Be Careful !!!
        * Valid values for ACNT/BCNT/CCNT are between 0 and 65535.
        * ACNT/BCNT/CCNT must be greater than or equal to 1.
        * Maximum number of bytes in an array (ACNT) is 65535 bytes
        * Maximum number of arrays in a frame (BCNT) is 65535
        * Maximum number of frames in a block (CCNT) is 65535
        */
		paramSet.aCnt       = acnt;
		paramSet.bCnt       = bcnt;
		paramSet.cCnt       = ccnt;
        /**
        * Be Careful !!!
        * Valid values for SRCBIDX/DSTBIDX are between –32768 and 32767
        * Valid values for SRCCIDX/DSTCIDX are between –32768 and 32767
        */

		paramSet.srcBIdx    = srcbidx;
		paramSet.destBIdx   = desbidx;
		paramSet.srcCIdx    = srccidx;
		paramSet.destCIdx   = descidx;

		paramSet.linkAddr   = 0xFFFFu;// NULL Link
		paramSet.bCntReload = BRCnt;// BRCnt; not used because not A synchronised
		// hinzugehörige Parameter noch einstellen
		result= EDMA3_DRV_setPaRAM(hEdma,chId, &paramSet);
    }
   /*
	* Since the transfer is going to happen in Manual mode of EDMA3
	* operation, we have to 'Enable the Transfer' multiple times.
	* Number of times depends upon the Mode (A/AB Sync)
	* and the different counts.
	*/

	if (result == EDMA3_DRV_SOK)
    {
        /*Need to activate next param*/
        if (syncType == EDMA3_DRV_SYNC_A)
        {
            numenabled = bcnt * ccnt;
        }
        else
        {
            /* AB Sync Transfer Mode */
            numenabled = ccnt;
        }

        for (i = 0; i < numenabled; i++)
        {
            irqRaised1 = 0;

            /*
            * Now enable the transfer as many times as calculated above.
            */
            result = EDMA3_DRV_enableTransfer (hEdma, chId,
                EDMA3_DRV_TRIG_MODE_MANUAL);
            if (result != EDMA3_DRV_SOK)
            {
                printf ("edma3_test: EDMA3_DRV_enableTransfer " \
                    "Failed, error code: %d\r\n", (int)result);
                break;
            }
            Semaphore_pend(AppSemHandle1,BIOS_WAIT_FOREVER);//edma3OsSemTake(AppSemHandle1, EDMA3_OSSEM_NO_TIMEOUT);
            /* Wait for the Completion ISR. */
            while (irqRaised1 == 0u)
            {
                /* Wait for the Completion ISR. */
                printf ("waiting for interrupt...\n");
            }

            /* Check the status of the completed transfer */
            if (irqRaised1 < 0)
            {
                /* Some error occured, break from the FOR loop. */
                printf ("\r\nedma3_test: Event Miss Occured!!!\r\n");

                /* Clear the error bits first */
                result = EDMA3_DRV_clearErrorBits (hEdma, chId);
                break;
            }
        }
    }


    /* Match the Source and Destination Buffers. */
    if (EDMA3_DRV_SOK == result)
    {
        for (i = 0; i <( (acnt*bcnt*ccnt)/(sizeof(short))); i++)// /2 because of type short
        {
            if (gBuf0[i] != gBuf1[i])//(srcBuff1[i] != dstBuff1[i])
            {
                Istestpassed = 0u;
                printf("edma3_test: Data write-read matching" \
                    "FAILED at i = %d\r\n", i);
                break;
            }
        }
        if (i == ((acnt*bcnt*ccnt)/(sizeof(short))))
        {
            Istestpassed = 1u;
        }


        /* Free the previously allocated channel. */
        result = EDMA3_DRV_freeChannel (hEdma, chId);
        if (result != EDMA3_DRV_SOK)
        {
            printf("edma3_test: EDMA3_DRV_freeChannel() FAILED, " \
                "error code: %d\r\n", (int)result);
        }
    }


    if(Istestpassed == 1u)
    {
        printf("edma3_test PASSED\r\n");
    }
    else
    {
        printf("edma3_test FAILED\r\n");
        result = ((EDMA3_DRV_SOK == result) ?
                    EDMA3_DATA_MISMATCH_ERROR : result);
    }
    return result;
}


/* Callback function 1 */
void callback1 (uint32_t tcc, EDMA3_RM_TccStatus status,
                void *appData)
{
    (void)tcc;
    (void)appData;

    switch (status)
    {
    case (EDMA3_RM_XFER_COMPLETE):
        /* Transfer completed successfully */
        irqRaised1 = 1;
        break;
    case EDMA3_RM_E_CC_DMA_EVT_MISS:
        /* Transfer resulted in DMA event miss error. */
        irqRaised1 = -1;
        break;
    case EDMA3_RM_E_CC_QDMA_EVT_MISS:
        /* Transfer resulted in QDMA event miss error. */
        irqRaised1 = -2;
        break;
    default:
        break;
    }
    Semaphore_post(AppSemHandle1);//edma3OsSemGive(AppSemHandle1);
//    return status;
}