Turn Off all IRQ using GCC

Hi,

I will forward this to the SW experts.

Hi Samantha,

You can disable interrupt only through INTC Registers. Please could you see the "6. Interrupts" from the TRM.

BR
Ivan

The standard IRQ enable/disable instructions on ARM are (using GCC inline assembly):

asm volatile( "cpsid i" ::: "memory" );
// ... code running with irqs disabled here ...
asm volatile( "cpsie i" ::: "memory" );

Note that "cpsie i" always enables them, so if you're not sure whether or not they were enabled before you'll probably want a proper save and restore instead:

// save current processor state (includes irq mask)
unsigned int psr;
asm volatile( "mrs %0, cpsr" : "=r" (psr) );
// disable irqs
asm volatile( "cpsid i" ::: "memory" );
// ... code running with irqs disabled here ...
asm volatile( "msr cpsr_c, %0" :: "r" (psr) : "memory" );

The volatile qualifier is actually optional in all these cases I think, but it doesn't hurt (and gcc might be allowed to move the "mrs" around too much without it but I'm not sure, I'd have to check the fine print for that). The "memory" clobber makes the instruction into a "compiler barrier" preventing gcc from moving any memory access across the instruction, which is probably what you want.

For readability, you'd put those definitions into inline functions in a header file of course.  If you need to save/restore irqs more than once in a single function, you only need to save psr the first time and can reuse it after that. (What is being saved/restored is actually the current processor mode, thumb execution state, IRQ mask bit, and FIQ mask bit. See the "System Level Programmers' Model" chapter of the ARM Architecture v7-A/R Reference Manual for more details. The boot ROM on an am335x makes FIQs unmaskable and unavailable for use.)

Note that functions for this are also in AM335x StarterWare, in "system_config/armv7a/gcc/cpu.c", but it seems the author didn't know about the cpsie/cpsid instructions and manually performs a read-modify-update of cpsr instead.

They also include a data sync barrier (dsb), which may in rare cases be useful before enabling interrupts (but almost certainly not before disabling interrupts).  Even so, I don't think it belongs in a general-purpose irq-enable/disable routine.  The proper use of memory barriers is something one needs to be aware of anyway when doing low-level programming.

They forgot a "memory" clobber though, but since they put the code in a separate C file this shouldn't cause problems... at least until you enable link-time optimization.