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SPI inter-byte timing setting in TMS320DM8148

Hi 

I need to change the inter-byte timing of a SPI data packet when sending from 8148 to device. Any advice on which register I should use? Thanks.  

Rgds

Dan

  • Moving this to the DM814X forum.

  • Dan,

    I have checked the DM814x McSPI module registers, and I found just one time control register:

    MCSPI_CH(i)CONF[26:25] TCS

    This is programmable timing control between chip select and external clock generation. For more info see DM814x TRM, sections 22.3.12 McSPI Channel (i) Configuration Register (MCSPI_CH(i)CONF) and 22.2.3.8 Chip-Select Timing Control

    See also the below e2e threads:

    http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/716/t/302472.aspx

    http://e2e.ti.com/support/dsp/omap_applications_processors/f/42/t/93517.aspx

    http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/99/t/37920.aspx

    BR
    Pavel