Team my customer wants to connect a UPP to an FPGA with 16 input pins and 16 output pins. I have been working through the documentation with him but I admit I have got a bit lost. Does anyone have an example of how to set this up?
This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Team my customer wants to connect a UPP to an FPGA with 16 input pins and 16 output pins. I have been working through the documentation with him but I admit I have got a bit lost. Does anyone have an example of how to set this up?
Chris,
Maybe the wiki site below or the links at the bottom of that page will help you out.
http://tiexpressdsp.com/index.php/Using_the_uPP_DSP/BIOS_Driver
Gus
Chris,
That driver comes with an example app that you can easily modify for your purposes. You just need to take one of the "loopback" modes and modify it to not use internal/digital loopback (or DLB). After that, the only thing you need to worry about is how to connect to the FPGA. The tricky part there is the dividison of uPP DATA and XDATA pins between channels, which is explained in the user guide (table 3).
Let me know if you have any more questions about all of this.
hello all:
This upp driver is DSP-specific and cannot be used directly by an ARM application,But now,I hope control the upp on ARM side,How can I do?Is there the driver in the linux package? or I have to writer the driver for the uPP under the linux system?
thanks.