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DSP code-optimization problem (boots no more if for PSC-init module optimization-level higher than 1 used)

Other Parts Discussed in Thread: OMAP-L137

Hello,
could anyone help me in the following boot-topic related issue.
I've almost solved the problem, one last detail is missing only.

The C6747 DSP in a custom-made hardware C6747 boots in a SPI0 master mode.
The problem it cannot boot when project optimization level of higher than 1 is used.

My usual method of debugging such a problem is analysing the SPI boot process using an oscilloscope, of course in conjunction with a generated .AIS file (created using a TI-Tool "HexAIS_OMAP-L137").
The AIS file gets created using a HexAIS_OMAP-L137 option crcCheckType=SECTION_CRC.
To simplify the analyzis, I keep booting-method quite simple: not even a sequential read mode is  used.

Using oscilloscope, I've recorded the SPI read access: it shows continuous DSP (being a SPI -master) read access of .AIS contents, including its last five 4-byte-portion (containing crc-validation and final jump into the application (label "_c_int00"):
    0x58535902,  VALIDATE_CRC_COMMAND
    0xACDDFD28,  CRC (expected)
    0xFFFFFEA8,  Seek (used in case of CRC-mismatch)
    0x58535906,  JUMP_CLOSE_COMMAND
    0x11811E20   _c_int00"  address: 11811e20 (in this case)
    };
Thus I conclude, the boot process is correctly performed. But, the booted application - doesn't run!

In order to trace where the problem occurs, I've added a test code in the main() being the first module accessed: doing a GPIO assert there, in order to trace if it reached.
Well, in problematic case, it isn't.
A suspicious point were two lines of code executed placed before PIO test-part appears: PLL-initialization and PSC (Power and Sleep Controller) initialization.

Meanwhile I found out that the problematic module is the latter one initializing PSC (Power and Sleep Controller).
In this module it gets determined which DSP peripherals are enabled, it is used at all.

If I reduce the optimization level to 1 for this module only, the application boots!

I've created a .asm C-compiler output for both, problematic and working version, and attach them, additionally to the .c source module.

Tools information: Code Composer Studio 5.5 (.0.00077) and C-compiler (CGT) v6.1.23.

Could someone help me understand why optimization prevents module from being executed properly?

Many thanks!
Mladen

Appendix (SPRU187O/may 2008, p.54): 

[opt_level=2 or -O2]
Performs all --opt_level=1 (-O1) optimizations, plus:
– Performs software pipelining (see Section 3.2)
– Performs loop optimizations
– Eliminates global common subexpressions
– Eliminates global unused assignments
– Converts array references in loops to incremented pointer form
– Performs loop unrolling
The optimizer uses --opt_level=2 (or -O2) as the default if you use --opt_level (-O) without an optimization level.

[opt_level=3 or -O3]
Performs all --opt_level=2 (or -O2) optimizations, plus:
– Removes all functions that are never called
– Simplifies functions with return values that are never used
– Inlines calls to small functions
– Reorders function declarations; the called functions attributes are known when the caller is optimized
– Propagates arguments into function bodies when all calls pass the same value in the same argument position
– Identifies file-level variable characteristics
If you use --opt_level=3 (or -O3), see Section 3.6 and Section 3.7 for more information.

C6747_PSC_boot_problem.zip
  • Hi Mladen,

    Have you checked the both working and non-working *.map file of your project ?

    Any difference in map file with and without optimization ?

  • Hi Mladen,

    In the PCS Enable functions I can see some while loops.  They are reading registers, but those registers are not marked as “volatile”. Therefore I could imagine that the optimizer removes the check in the loop and only checks once.

    Please try to make those volatile:

    // PSC Module Related Registers:
    #define PSC0_MDCTL      (CSL_PSC_0_REGS+0xA00)
    #define PSC0_MDSTAT     (CSL_PSC_0_REGS+0x800)
    #define PSC0_PTCMD      *(unsigned int*) (CSL_PSC_0_REGS + 0x120)
    #define PSC0_PTSTAT     *(unsigned int*) (CSL_PSC_0_REGS + 0x128)

    #define PSC1_MDCTL      (CSL_PSC_1_REGS+0xA00)
    #define PSC1_MDSTAT     (CSL_PSC_1_REGS+0x800)
    #define PSC1_PTCMD      *(unsigned int*) (CSL_PSC_1_REGS + 0x120)
    #define PSC1_PTSTAT     *(unsigned int*) (CSL_PSC_1_REGS + 0x128)

    Best regards,
      Robert

  • Hi,

    For more understanding and detailed information on optimization levels of compiler, please have a look at the chapter 3 " Optimizing Your Code"
    http://www.ti.com/lit/ug/spru187q/spru187q.pdf

    Regards,
    Shankari

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