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AM335x: Reset the device with command for warmrstn

Kaka
Guru 24520 points

Hi community member,

Would you please provide answer for my question?

[Question]

  When I inputted the following command at u-boot, the device will restart after send command.

  * Command

     mw 0x44E109B8.l 0x00 1

Would you please explain why this device will reboot with this device?

I do not know why the device will reboot with this command.

Best regards.

Kaka

  • 0
    TI__Guru**** 393215 points

    Hi Kato-san,

    0x44E109B8 is the address location of conf_warmrstn register. Can you tell me what you are trying to achieve by trying to pinmux the warm reset pin?

  • 0 in reply to Biser Gatchev-XID
    Guru 24520 points

    Hi Biser,

    My customer would like to use this pin as reset source to other peripheral devices.

    Note: I also post this question to the following forum.  I would like to know whether they can use it or not.

     http://e2e.ti.com/support/arm/sitara_arm/f/791/t/387235.aspx

    First of all, can it control the WARMRSTn pin status by changing the register of conf_warmrstn?

    Best regards,

    Kaka

  • 0 in reply to Kaka
    TI__Guru**** 393215 points

    No, I think I answered that on your other post. Warm reset will reset the processor too. If your customer wants to issue a reset to external devices only, they should use a GPIO for this purpose.

  • 0 in reply to Biser Gatchev-XID
    Guru 24520 points

    Hi Biser,

    I will propose your suggestion.

    Also, would you please explain why the device will reboot by the following command?

     mw 0x44E109B8.l 0x00 1

    My customer requested to us why this phenomenon has occurred.

    Best regards.

    Kaka

  • 0 in reply to Kaka
    TI__Guru**** 393215 points

    I cannot say exactly. My opinion is that trying to write into the warm reset padconf register triggers a transition which is interpreted as a warm reset by processor logic. Anyway, I have never heard of anyone trying to modify this register.

  • 0 in reply to Biser Gatchev-XID
    TI__Guru* 86550 points

    You are disabling the receiver on the warm reset IO, which in turn negates the effect of the external pullup resistor that likely exists on this pin.  This will trigger a warm reset. 

    Regards,

    James

  • 0 in reply to JJD
    Mastermind 8040 points

    JJD said:
    You are disabling the receiver on the warm reset IO, which in turn negates the effect of the external pullup resistor that likely exists on this pin.  This will trigger a warm reset. 

    I can confirm that disabling the receiver (bit 5 of its pinmux register) will cause a pin to always read as zero, regardless of the actual level on the pin. This means the reset logic will detect a falling edge on the pin and commence the reset procedure.

    (The write command shown also changes the internal pull-up to an internal pull-down, but since the internal pull is fairly weak this is unlikely to override the external pull-up which is normally present.)

    To be honest, I have no idea why this pinmux register exists at all.