C6748 polling interrupt flag

Franz Kurniawan

hi e2e community..

im using LCDK 6748 and currently working on EHRPWM project..

my project required very fast of PWM period and need to update the pulse width on every period..

the EHRPWM will do event trigger when the counter reach TBPRD and set the interrupt flag..

i can do the updating by using interrupt , but it will increase the machine cycles very much during the interrupt service calling..

then i wonder if i can do the interrupt flag (IFR) polling without having the CPU to call the interrupt service..

i read in some document about the polling IFR flag, but it doesn't clear enough for me..

i have tried to do below experiment :

* enable global interrupt , disable individual interrupt --> IFR flag doesn't set

* enable global interrupt , enable individual interrupt --> IFR flag does set on every CNT = TBPRD, but it will call for interrupt service routine..

is there a way to read the interrupt flag without executing the interrupt routine?

thank you

over 11 years ago

0 Sivaraj Kuppuraj over 11 years ago

TI__Mastermind 35645 points

Hi,

Thanks for your post.

May be, you could introduce a delay routine before calling the ISR and immediately after the polling IFR flag status change and other than this, if just to know simply the status of IFR flag, you could disable the interrupt register setup routine & check the IFR flag status, but it is not functionally right, just for debugging.

Also, I observe, there is a proper procedure to initialize interrupts as specified in section 2.2 in the ehrpwm user guide as below, kindly check the initialization flow which is recommended for smoother operation.

http://www.ti.com/lit/ug/sprufl3c/sprufl3c.pdf

Alternatively, i could think of controlling and monitoring the time base submodule by specifying the ePWM time-base counter (TBCNT) frequency or period to control how often the events can occur. By this, you could also think to control the ISR execution, i guess. Please check sections 2.3.1 & 2.3.2 from the above user guide. You can also check the status of time base register through TBSTS, refer section 4.1.2 and you could control the time base control register (TBCTL) through CLKDIV & HSPCLKDIV. May be, you could get more idea when you check the below E2E thread to generate PWM with variable frequency and duty cycle:

http://e2e.ti.com/support/dsp/tms320c6000_high_performance_dsps/f/115/p/284434/993399.aspx#993399

Thanks & regards,

Sivaraj K

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0 Franz Kurniawan over 11 years ago in reply to Sivaraj Kuppuraj

Prodigy 220 points

hi sivaraj..

thanks for your answer .. it gave me some ideas for my project..

i decided to monitor the TBCNT value for updating the next CMPA value..
this way i can much reduce the machine cycles rather than when it used ISR..

however i found that the measured machine cycles is higher than it should be..
i used counter (TBCNT) to measure the executed code.. i wrote the code in assembly as below:

....
MPY .M2 B7,B5,B7 --> Breakpoint 1

wait :
LDH .D1 *A18, A7 --> Breakpoint 2
ADDK .S1 1, A31 ; A31 = loop count monitoring
NOP 3
CMPGT2 .S1 A9, A7, A0
[!A0] B .S2 wait
NOP 5

STH .D1 B7, *A19 --> Breakpoint 3

i put 3 breakpoint as above.. at this way, the measured machine cycles is considered correct
Breakpoint 1 ~ Breakpoint 2 = 1
Breakpoint 2 ~ Breakpoint 3 = 12

but when i removed Breakpoint 2 , the measured machine cycles is increased dramatically
Breakpoint 1 ~ Breakpoint 3 = 64 (no looping on "wait" label)

why does the code execution become slower ?
is it because of CCS execution and debug mode? when i used the Release mode i also get the same result..

FYI, i'm using LCDKC6748 + XDS100v2 emulator..

thank you..

0 Franz Kurniawan over 11 years ago in reply to Sivaraj Kuppuraj

Prodigy 220 points

hi sivaraj,

i have already tried the standalone mode by flashing with Starterware Bootloader + my application into LCDK kit..
but the performance (consumed machine cycles) was still the same with CCS program execution..

if i calculate the machine cycles from assembly step, my code should take only 40 cycles..
however when it is executed, the code could consume about 240 cycles.. therefore i cannot put TBPRD below 240..

why is it the actual execution much longer than it should be?
is it because of the code put into DDR2 memory?

and the DDR is also only configured for 150MHz.. is it possible if i increase the DDR clock into 456MHz?

thank you

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C6748 polling interrupt flag