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Cannot driver GPIOs on AM437x

Other Parts Discussed in Thread: AM4372

I just upgraded from an old Panda board to the AM437x, but I cannot use the GPIOs like I used to.

I tried doing it using the standard Linux command-line :

am437x-evm login: root
root@am437x-evm:~# cd /sys/class/gpio/
root@am437x-evm:/sys/class/gpio# ls
export      gpiochip0   gpiochip32  gpiochip64  gpiochip96  unexport
root@am437x-evm:/sys/class/gpio# echo 0 > export
root@am437x-evm:/sys/class/gpio# ls
export      gpio0       gpiochip0   gpiochip32  gpiochip64  gpiochip96  unexport
root@am437x-evm:/sys/class/gpio# cd gpio0/
root@am437x-evm:/sys/devices/virtual/gpio/gpio0# ls
active_low  direction   edge        power       subsystem   uevent      value
root@am437x-evm:/sys/devices/virtual/gpio/gpio0# more direction
in
root@am437x-evm:/sys/devices/virtual/gpio/gpio0# echo out > direction
root@am437x-evm:/sys/devices/virtual/gpio/gpio0# more direction
out
root@am437x-evm:/sys/devices/virtual/gpio/gpio0# more value
0
root@am437x-evm:/sys/devices/virtual/gpio/gpio0# echo 1 > value
root@am437x-evm:/sys/devices/virtual/gpio/gpio0# more value
1
root@am437x-evm:/sys/devices/virtual/gpio/gpio0# echo 0 > value

Based on the documentation, GPIO_0 is supposed to be PIN 3 on the GPIO header J30, but I cannot see any level on it.

Am I missing some step?

Regards,

Michele

  • Hi Michele,

    Actually pin 3 of J30 exposes GPIO0_3 (processor pin L24 in pinmux mode 9). If you are looking at the EVM schematic, these are only net names which can be misleading. On AM437X part of the GPIO's can be pinmuxed to two processor pins. You will need to check pinmux in your software to see which pin is used. Also use the AM437X Datasheet Rev. A Table 4-10 to see correct processor pin numbers.

  • Thanks for the quick answer! Actually I am using as reference Table 22 from the "AM437x GP EVM Hardware User's Guide", where PIN 3 is marked as GPIO0 .... so there is an error in the document?
  • GPIO0 is the net name used in the schematic (http://processors.wiki.ti.com/index.php/AM437X_EVM_Boards ). If you trace this on the schematic file you will see that it goes to processor pin L24, which can be pinmuxed to gpio3_21 in mode 0x7 or gpio0_3 in mode 0x9.

  • Sorry but I am completely lost here .... When I am running Linux how can I know the pinmux mode and therefore understand to which pin the logical GPIOs are connected ?
  • This is defined somewhere in the device tree files.

  • Let me try to give a bit more detail:

    Table 4-10 in the AM437X Datasheet Rev. A lists all I/O pins with their pin names. As you will see most pins have more than one signal function, which is selected by the respective mode for the pin. This is done by modifying the pad control register for the pin (section 7.2.1 in the AM437X Technical Reference Manual Rev. A).

    Linux pin naming convention follows the pin names from Table 4-10 in the AM437X Datasheet Rev. A. As said above this is normally placed in the .dts files for the board.

    Hope this helps.

  • I start understanding a little bit better, but I am still missing something fundamental.

    I am trying to follow your example for A to Z :

    - in the "Am437x_gp_evm_3k0006_schematic_rev1_4a.pdf" file I see that Pin 3 of J30 is connected to pin L24 of the processor
    - in table Table 4-10 of the "AM437X Datasheet Rev. A"I see that L24 can expose either gpio3_21 in mode 0x7 or gpio0_3 in mode 0x9

    - I go to my arago sources and open "am437x-gp-dvm.dts" and the included "am4372.dtsi" ... and I find none of the "signal name"s listed in table 4-10!

    - once I start my Linux I can go to the /sys/class/gpio I can do either "echo 117 > export" or "echo 3>export" (for gpio3_21 and gpio0_3 respectively). Does exporting one of them sets the mux mode accordingly or do I need to do it seperately?

    Thanks and sorry for the tedious questions, but I really want to understand this!

    Michele
  • Hi,

    I'll try to explain what is meaning pin muxing analyzing one line from the dts file. See file <>/ti-sdk-am335x-evm-07.00.00.00/board-support/linux-3.12.10-ti2013.12.01/arch/arm/boot/dts/am437x-gp-evm.dts. On line 170 you see that is starting initialize the pinmux_mmc1_pins. On the line 178 code is: "0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */. I propose to explain all of the line.
    - 0x160 - this is the offset of spi0_cs1 ball.
    - (PIN_INPUT | MUX_MODE7) - this mean that on the ball spi0_cs1 will set value equal to (PIN_INPUT | MUX_MODE7).This ball can be initialize depending "data sheet" "Table 4-10. Pin Attributes" by 10 different functionality (spi0_cs1, uart3_rxd, eCAP1_in_PWM1_out, ..., timer0). From the TRM p7.2.1 "Table 7-1. Pad Control Register " bits [3-0] are MUXMODE - these bits will define functionality of this ball. In our case this is MUX_MODE7 - this means that we choose gpio0_6. Other parameter PIN_INPUT mean that this gpio is initialized as input/output. Other is a comments. Now you have to use gpio_request() and then you can read it.

    BR
    Ivan
  • Ivan, Biser,

    thanks to your explanations I understand it perfectly now, but I still cannot make it work!

    For instance: from the schematic I see that pin M24 of the processor is tied to pin 20 on the board. In table 4-10, I see that the pin default mode is 7, so gpio3_17 accesses the pin. I therefore go to the sysfs and make an "echo 113 > export" to expose GPIO 113 = 96+17 (17 on bank 3). I now set it to "out" and try changing its value between 0 and 1, and see it on my oscilloscope .... and nothing happens!

    The oscilloscope setup is fine because when I observe 24 and 26 I see that they are at high (the idle value of I2C)....

    What am I missing?

    Regards,

    Michele