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AM437x Sitara DDR3

Ilya Budnikov
Prodigy 20 points

Greeting!

I have to design a board with AM437x Sitara and DDR3 memory,

Then I was readign the datasheet, I found the next phrase, which I cant understand,

When not using all or part of a DDR3 interface, the proper method of handling the unused pins is to tie off the
DDR_DQS[n] pins to the VDDS_DDR supply via a 1-kΩ resistor and pulling the DDR_DQS[n] pins to ground via
a 1k-Ω resistor. (5.12.8.2.1.3.1 DDR3 Interface Schematic, document sprs851a),

Am I understand right that I have to connect unused DDR_DQS pins to VDDS_DDR pin through 1k resistors and DDR_DQSn pins to ground (GND) through 1k resistor too?

Thanks,

Ilya

  • 0
    TI__Guru**** 393215 points

    Hi Ilya,

    Yes, your understanding is correct.

  • 0 in reply to Biser Gatchev-XID
    TI__Guru* 86460 points

    Sorry, Biser, i need to correct you as this is actually a typo.  It should read as follows:

    When not using all or part of a DDR3 interface, the proper method of handling the unused pins is to tie off the DDR_DQS[x] pins to the VDDS_DDR supply via a 1-kΩ resistor and pulling the DDR_DQSn[x] pins to ground via a 1-kΩ resistor.

    Also, if your board does not currently have this, it will probably still be functional and should be OK for prototyping.  The above statement is just to define best practices for unused signals.

    Regards,

    James