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K2E Power Sequencing

Other Parts Discussed in Thread: UCD9090

I am using the K2E_EVM as a starting point for a K2E based hardware design, and it is not clear how I should control the Power Sequencer (U4, UCD9090). I am assuming the power sequencer needs to be programmed prior to initial processor power up; is this correct? Also, referrring to the K2E_EVM schematic, the source of the input I2C bus to U4 Power Sequencer (UCD9090), comprised of nets PW_SEQ_SCL and PW_SEQ_SDA, appears to be selectable so that the sequencer can be accessed by the BMC, the K2E I2C, or the K2E Smart Reflex. The BMC appears to be controlling which of these entities is currently connected to the power sequencer. In my design, the BMC will not be used. How should the sequencer be controlled in this case? Do I need to allow both K2E I2C and SmartReflex I2C access to this interface? What should determine which entity should be accessing the sequencer via the I2C at any given time? I am assuming that the SmartReflex section should control/monitor the power up sequence. Is the K2E I2C section possibly only used for status? Is there any documentation that explains this in-depth?

  • Hi Kerry,
    Working with experts to get a response on this. Thank you for your patience.
  • The UCD9090 includes a set of registers loaded from internal nonvolatile memory. The programming of the memory is achieved using the PMBus interface. Most customer will program the UCD9090 as part of their production process eliminating the need for a connection to a devices such as the BMC. That connection was included as part of the EVM design to allow updating the programming of the UCD9090 in the field. The UCD9090 is programmed using the Fusion digital power software or the Fusion digital power manufacturing tool. Both of these are available from the UCD9090 page on TI.com. The UCD9090 xml file containing the configuration used on the K2E EVM can be downloaded from the eInfochips resource page for that product. This file can be loaded into the fusion tools as a source file.
    Regards, Bill

  • Do I just need to program the UCD9090 for the correct power up sequence? Do I need the SmartReflex information specific to the processor in order to monitor for the correct voltage? My (limited) understanding of the SmartReflex is that specific power information is stored on each individual processor at the factory, and this info is used as part of the SmartReflex to meet power requirements. Is this process completely transparent to the user, or are there steps that must be performed with each individual processor power sequencer/monitor for proper operation?
  • Hi Kerry,
    SmartReflex is not part of the power sequencing. The SmartReflex interface for the K2E uses the VCNTL interface to program the voltage level for the CVDD voltage rail. Initially, the power supply circuit will bring up the CVDD voltage rail at 1V after it is enabled. At some time after the reset to the K2E has been released, the processor will signal the necessary voltage level for CVDD using the VCNTL interface. The UCD9090 is only used to enable the CVDD power supply.
    Regards, Bill