• State
  • Locked Locked
  • Replies 2 replies
  • Subscribers 98 subscribers
  • Views 426 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320C5515 EMIF SOFTWARE DISABLE

Vinod Kumar5
Prodigy 155 points

Hi,

I have powered DVDDEMIF & I am using only GPIO peripherals of EMIF.

I have grounded some of the EMIF pins.

Processor is working fine & peripherals are tested.

But processor is heating too much.

Please guide to disable EMIF through software.

  • 0
    TI__Genius 12575 points

    Hi,

    Did you try peripheral clock gating. The peripheral clock gating allows software to disable clocks to the DSP peripherals, in order to reduce the peripheral's active power consumption to zero. Aside from the analog logic, the DSP is designed in static CMOS; thus, when a peripheral clock stops, the peripheral's state is preserved, and no active current is consumed.

    The peripheral clock gating configuration registers (PCGRC1 and PCGCR2) are used to disable the clocks of the DSP peripherals. In contrast to the idle control register (ICR), these bits take effect within 6 SYSCLK cycles and do not require an idle instruction.

    EMIF clock gate control bit. This bit is used to enable and disable the EMIF peripheral clock.

    NOTE You must request permission before stopping the EMIF clock through the peripheral clock stop request/acknowledge register (CLKSTOP).

    For additional Information Please refer to C5515 system's user guide 'SPRUFX5E" .

    Hope the above information helps.

    Regards

     Vasanth

     

     

     

  • 0
    TI__Genius 12575 points

    Hi,

    Did you try peripheral clock gating. The peripheral clock gating allows software to disable clocks to the DSP peripherals, in order to reduce the peripheral's active power consumption to zero. Aside from the analog logic, the DSP is designed in static CMOS; thus, when a peripheral clock stops, the peripheral's state is preserved, and no active current is consumed.

    The peripheral clock gating configuration registers (PCGRC1 and PCGCR2) are used to disable the clocks of the DSP peripherals. In contrast to the idle control register (ICR), these bits take effect within 6 SYSCLK cycles and do not require an idle instruction.

    EMIF clock gate control bit. This bit is used to enable and disable the EMIF peripheral clock.

    NOTE You must request permission before stopping the EMIF clock through the peripheral clock stop request/acknowledge register (CLKSTOP).

    For additional Information Please refer to C5515 system's user guide 'SPRUFX5E" .

    Hope the above information helps.

    Regards

     Vasanth