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Can you select which clock the hardware watchdog uses?

I am using SDK 7.0 for the am335x-evm board.  Is it possible to select a specific clock for the watchdog to use?  Say between and external clock and the on chip RTC?

  • Hi Tim,

    The Watchdog on the AM335x supports selecting either the on-chip ~32768 Hz oscillator or the PER PLL generated 32.768 KHz clock within the PRCM of the device as outlined in section 20.4.2 of the TRM.

    The clock selection for the watchdog timer in SDK 7 defaults to using the PLL generated 32.768 KHz clock which can be seen in the am33xx_clk_init function found in {SDK7_Install_Dir}/board_support/{linux_version}/drivers/clk/ti/clk-33xx.c. This is done as a result of the on-chip RC oscillator clock not being an accurate clock-source for watchdog or real-time clock needs. The clocks referenced within am33xx_clk_init are defined within the am33xx-clocks.dtsi devicetree file.

            /*
             * The On-Chip 32K RC Osc clock is not an accurate clock-source as per
             * the design/spec, so as a result, for example, timer which supposed
             * to get expired @60Sec, but will expire somewhere ~@40Sec, which is
             * not expected by any use-case, so change WDT1 clock source to PRCM
             * 32KHz clock.
             */
            clk1 = clk_get_sys(NULL, "wdt1_fck");
            clk2 = clk_get_sys(NULL, "clkdiv32k_ick");
            clk_set_parent(clk1, clk2);

    Hopefully this information helps!

    Sincerely,

    Mark-

  • Thank Mark,

    So it is using the PLL generated 32.768 KHz and the XTAL (clock in) is shorted or it stops working (XTAL becomes defective), does the watchdog timer also stop?
  • Hi Tim,

    Yes, the watchdog timer itself would also stop as a result of the Peripheral PLL's source, the master oscillator, becoming stopped. The Peripheral PLL is what drives the 32.768 KHz clock as seen in Figure 8-11 of the TRM.

    Regards,

    Mark-