Which is an initial value of MODE of some pins at AM437x ?

shigehiro tsuda

Hi,

It is different from an initial value of MODE listed in Table4-10 in Datasheet(SPRS851A) with an initial value of Pad Control Register in Technical Reference Manual(SPRUHL7A).
Which is right?
I think that a mention of Datasheet is right, but, please tell those pins if there is an exception.
Example)
About GPMC_ADx terminal, it is Mode7 in Datasheet, but is Mode0 in Technical Reference Manual.

Best Regards,
Shigehiro Tsuda

over 10 years ago

0 Biser Gatchev-XID over 10 years ago

TI__Guru**** 393215 points

Hi Shigehiro-san,

Both documents are correct. Table 4-10 in the datasheet lists I/O pin mode at reset release time. After this moment, when ROM code starts executing, it will configure the necessary pins as selected by the boot mode settings.

0 shigehiro tsuda over 10 years ago in reply to Biser Gatchev-XID

Mastermind 9490 points

Hi Biser-san,

Thank you for quick reply.

When bootmode of the pin irrelevant to GPMC is set, in MODE of the GPMC_ADx pin, will the initial value become MODE0?
For example, it is bootmode=0x00010
After making connect in CCS, and confirming a register, the value of CTRL_CONF_GPMC_AD0 becomes 0x08040007.
This accords with an initial value of Datasheet.
Is TRM not wrong?
If TRM is right, will an ROM cord change MODE to 0x7 from 0x0?

Best Regards,
Shigehiro Tsuda

0 Biser Gatchev-XID over 10 years ago in reply to shigehiro tsuda

TI__Guru**** 393215 points

Yes, if the ROM code determines that the boot source is GPMC it will change the reset release mode of the pin.

0 shigehiro tsuda over 10 years ago in reply to Biser Gatchev-XID

Mastermind 9490 points

Hi Biser-san,

Thank you for reply.

If the boot source is not choice in conjunction with GPMC, what does the pin connected with GPMC set?

Will all pins be set in GPIO of 0x7?

Best Regards,

Shigehiro Tsuda

0 Biser Gatchev-XID over 10 years ago in reply to shigehiro tsuda

TI__Guru**** 393215 points

This information is given in Datasheet Table 4-10. See column "BALL RESET REL. MODE".

0 shigehiro tsuda over 10 years ago in reply to Biser Gatchev-XID

Mastermind 9490 points

Hi Biser-san,

Thank you for quick reply.

I can understand it.

The descriptions such as CONF_GPMC_AD0_MMODE bit of CTRL_CONF_GPMC_AD0 Register of TRM become 0x0 after reset.

Is it a mistake of TRM?

Best Regards,

Shigehiro Tsuda

0 Biser Gatchev-XID over 10 years ago in reply to shigehiro tsuda

TI__Guru**** 393215 points

Yes, probably this is a mistake. You can report it directly to the TRM team by using the "Submit Documentation Feedback" link at the bottom of each page of the PDF document.

0 shigehiro tsuda over 10 years ago in reply to Biser Gatchev-XID

Mastermind 9490 points

Hi Biser-san,

Thank you for quick reply.

I could understand that a mention of TRM is wrong.
I intend to report it by using the "Submit Documentation Feedback" .

Best Regards,
Shigehiro tsuda

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Which is an initial value of MODE of some pins at AM437x ?