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TMS320C6727B EMIF / External Interrupt Question

Paul Joseph
Expert 2795 points

Running the EMIF bus with asynchronous 8-bit, 32-bit devices (reading and writing to them; FPGA’s, NOR Flash’s, ADC’s, RTC.) and 32-bit SDRAM at the same time. It appears you have to set the bus to 8-bits, 16-bits, or 32-bits. If you set the bus to 32-bit how would the 8-bit NOR Flash boot if I would want that?

I need to decode the address bus and the output all chip selects from the CPLD (not the SDRAM)

Also, external Interrupts seem to take the SPI ports, is that correct, thank you.

  • 0
    TI__Guru** 116100 points
    Hi Paul,
    Are you using SPI NOR flash or parallel NOR flash ?
    Could you please elaborate a bit on your question.
  • 0 in reply to Titusrathinaraj Stalin
    Expert 2795 points

    Was planning parallel NOR flash, I could try to boot from an SPI NOR Flash but I need at least 3 External Interrupts.

  • 0 in reply to Paul Joseph
    TI__Guru** 116100 points
    Hi Paul,

    Sorry for the delayed response.
    Yes, you can boot 8bit NOR flash with 32bit SDRAM and if any shortage of address lines then you need to use GPIO as address lines for NOR flash while bootup since EMIF had very limited address lines.

    SDRAM uses the CS0 whereas NOR,NAND uses the CS2 as a chip select.

    Please refer to the C6727 data sheet chapter 4.11.1 and figure 4-5.

    http://e2e.ti.com/support/dsp/tms320c6000_high_performance_dsps/f/115/t/12367

    Why do we need 3 external interrupts for SPI flash ?
  • 0 in reply to Titusrathinaraj Stalin
    Expert 2795 points

    I will not be using CS2 as the chip select for individual IC’s. That will come from a CPLD which will be connected to the address bus and CS2.

    If the EMIF is set to 32-bit mode is using an 8-bit NOR Flash(Hex file: 8-bit output) for boot and storage a problem?

    I’ll have many 8-bit and 32-bit devise on the EMIF bus. I’ll need an address bus that is [20:0] wide (EM_A[12:0] and  GPIO[20:13]) to access all my data. The GPIO’s can be used for extra address for booting but can they be used for normal operation?

  • 0 in reply to Paul Joseph
    TI__Guru* 84110 points

    Paul,

    You can change the EMIF configuration between operations, but that would be very time consuming. If that is what you plan to do, I hope it is for a demonstration platform and not a real product. For demonstration purposes, this would work fine since you can set the EMIF for 8-bit width and run tests that way, then change the EMIF to 32-bit width and run tests that way.

    For normal operation, you cannot mix the data bus width on the EMIF from one address to another. There will be one configuration and you will get the same use when accessing any address within the CS2 address range.

    Your CPLD could be designed to be very complex and could map different address ranges to different configurations on the far side (away from the DSP) as long as the near side (connected to the DSP) only acts as a single configuration width.

    If this design is for a real-time system and not a demonstration platform, you should move to a newer DSP that can support more chip selects to give you more choices without the complexity of the CPLD. Look at the C6747, C6748, or C6655 as other choices that could be more powerful and easier to use.

    Regards,
    RandyP