Ducati preemption protection issue

Hello Kristian,

This is the right place for discussing OMAP4 or Ducati issues.

However, Ducati software is not public available and it is needed to have NDA agreement with TI. A good approach for solving Ducati issues to contact your FAE.

The only public available information for Ducati is at http://www.omappedia.org/wiki/Ducati_For_Dummies

Could you explain more details about your Ducati issues?

Best regards,

Yanko

Hi Yanko,
we have an NDA and thus the Ducati source code.

Hopefully I can say as much as that there is a place where the Ducati code disables interrupts for appr 2msec, which is not a good thing to do. Would be nice to discuss with someone the code... but I have to point to the source code etc in order to explain further.

Best regards
Kristian

Hello Kristian,

I suggest  you to see following - http://software-dl.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/sysbios/6_34_06_26/exports/bios_6_34_06_26/docs/cdoc/ti/sysbios/family/arm/ducati/Wugen.html#xdoc-desc

https://gitorious.org/ducati-syslink/ducati-syslink/source/b5c6a8bd4e3d17aef4079e2f05a631819adc0d30:packages/ti/sdo/ipc/family/omap4430/InterruptDucati.c

Best regards,

Yanko

Hello Yanko,
thanks for your hint.

Since you linked in snippet from ducati-syslink source: My specific issue is located in ducati-mm, OMX Integration layer. There is a place where interrupts are disabled (via Gate_enterSystem() which defaults to Hwi_disable()), and then copies a struct of 27KB with memcpy(). If you allow, I can copy a code snippet in here. Otherwise, I can proceed through FAE.

Our Ducati configuration does not try to define a non-default system gate (ie using mutex). That *could* be a root cause, but not entirely convinced...

BR
Kristian