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Routing requirements for K2E REFRES and RZQ resistors?

RandyP
Guru* 84110 points

Are there any special route considerations or requirements for the reference resistors for the high speed serial interfaces? How long can the traces be?
Same question for the RZQ resistors on the DDR3 interface.

SGMII REFRES pins
PCIE REFRES pins
DDRRZQ pins

We couldn't find anything in the HW design guide, or the DDR3 guide, PCIe Guide etc..

Regards,
RandyP

  • 0
    TI__Mastermind 42545 points

    Hi RandyP,

    These resistors should be place as close to the pin of the SOC as possible. For example, the K2E EVM has the resistors directly under the part at the via next to the REFRES pads. While placing the resistor under the part is not a requirement, it is the ideal placement. The trace to the resistor should be kept as short as possible.

    Regards, Bill