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Set up the MCBSP0_XINT McBSP0 interrupt C6657

Other Parts Discussed in Thread: TMS320C6655

Dear all,

I try to set up and configure the interrupt MCBSP0_XINT for the C6657 architecture. I am going through the related post c6000_multi-core_dsps/f/639/t/225788 but I have some questions.

In my example I want to map the the MCBSP0_XINT to the CIC0_OUT42. I use the following piece of code

//NOTE: Reference table 7.33 TMS320C6655/57
/// Map MCBSP0_XINT event to CIC0_OUT40
CpIntc_mapSysIntToHostInt(0, 33, 42);

/// Configures a CpIntc ISR dispatch entry
CpIntc_dispatchPlug(33,(CpIntc_FuncPtr) &tx_function0, 0, TRUE);

///Enables the host interrupt
CpIntc_enableHostInt(0, 40);
eventId = CpIntc_getEventId(40);
Hwi_Params_init(&params);
params.arg = 0;
/// required to be the host interrupt #
params.eventId = eventId;
params.enableInt = TRUE;

Hwi_create(4, &CpIntc_dispatch, &params, NULL);

Is this correct?

Can I map any secondary interrupt to any primary interrupt? Is any limitation?

In the function CpIntc_mapSysIntToHostInt the second argument is the event id of the secondary system interrupt. Why the value of the third argument is 42.

If we use the event ids for the mapping we should use the event id 58.

Can you please give me a brief explanation?

Best regards

George