C6657 memory access priority of CPU vs. EDMA3

Steve,A local access is a direct DSP access to L1D, L1P, and L2.
L1D/L1P (via CPUARBD), memory accesses made directly in L2.
EMC blocks (via the CPUARBU and CPUARBE registers) use the priority(PRI).
The default value of PRI is set so that the DSP transactions are the second to highest in the system.
The DSP priority is run-time programmable, although you are expected to initialize the CPUARB registers at system initialization.
On the otherhand, a global access is initiated by a DMA or by other system masters.
Here,the EDMA transfers programmed by the DSP count as global accesses.
To find more detailed information for priority, refer the section "2.14 EDMA3 Prioritization" and "4.2.1.8 Queue Priority Register (QUEPRI)" in the Keystone EDMA3 Controller user guide.
The below wiki will be useful for EDMA
http://processors.wiki.ti.com/index.php/EDMA3
http://processors.wiki.ti.com/index.php/Programming_EDMA_without_EDMA3LLD_package

Hi Pubesh,

I cannot find CPUARB D/E registers.  They are not in SPRS814A.pdf and SPRUGS5A.pdf.  Could they have other names?

Thank you.

Regards,

Steve