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DDR Timing parameters in DM8168

Hi,

I am using DM8168 processor with the EZSDK version of 5_05_02_00 and the U-boot version 2010.06-psp04.04.00.01. I want to know where and in which registers the below parameters of DDR are setting in source code:

Data Setup time to DQS, DQS# (tDS)
Data hold time from DQS, DQS# (tDH)

CTRL, CMD, ADDR setup to CK, CK# (tIS (AC160))
CTRL, CMD, ADDR setup to CK, CK# (tIS (AC135))
CTRL, CMD, ADDR hold from CK, CK# (tIH (DC90))

Please provide the same for above parameters.

Thanks in advance.

Regards,
Salih